HI3-7153A-9 INTERSIL [Intersil Corporation], HI3-7153A-9 Datasheet - Page 12

• Manufacturer Part Number: HI3-7153A-9
• Description: 8-Channel, 10-Bit High Speed Sampling A/D Converter
• Manufacturer: INTERSIL [Intersil Corporation]

Pin Description
Detailed Description
The HI-7153 is an 8 channel high speed 10 bit A/D converter
which achieves throughput rates of 200kHz by use of a Two
Step Flash algorithm. A pipelined operation has been
achieved through the use of switched capacitor techniques
which allows the device to sample a new input voltage while
a conversion is taking place. The 8 channel multiplexer can
be randomly addressed. The HI-7153 requires a single
reference input of +2.5V, which is internally inverted to -
2.5V, thereby allowing an input range of -2.5V to +2.5V. The
ten bits are two’s complement coded. The analog and refer-
ence inputs are internally buffered by high speed CMOS
buffers, which greatly simplifies the external analog drive
requirements for the device.
DIP
PIN
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
SYMBOL
SMODE
TEST
V
A
A
A
A
A
A
A
A
ALE
WR
AG
NC
RD
CS
A0
A1
A2
REF
IN0
IN1
IN2
IN3
IN4
IN5
IN6
IN7
Reference voltage input (+2.50V)
Analog ground reference (0V)
Analog input channel 0
Analog input channel 1
Analog input channel 2
Analog input channel 3
Analog input channel 4
Analog input channel 5
Analog input channel 6
Analog input channel 7
No connect or tie to V+ only
Test pin. Connect to DG for normal operation
Mux address input. (LSB) Active high.
Mux address input. (LSB) Active high.
Mux address input. (MSB) Active high.
Mux address enable. When high, the latch is
transparent. Address data is latched on the
falling edge.
Write input. With CS low, starts conversion
when pulsed low; continuous conversions
when kept low.
Chip select input. Active low.
Read input. With CS low, enables output buff-
ers when pulsed low; outputs updated at the
end of conversion.
Slow memory mode input. Active high.
DESCRIPTION
HI-7153
12
Analog to Digital
Section The HI-7153 uses a conversion technique which is
generally called a ‘‘Two Step Flash’’ algorithm. This
algorithm enables very fast conversion rates without the
penalty of high power dissipation or high cost. A detailed
functional diagram is presented in Figure 1.
The reference input to the HI-7153 is buffered by a high
speed CMOS amplifier which is used to drive one end of the
resistor string. Another high speed amplifier configured in
the inverting unity gain mode inverts the reference voltage
with respect to analog ground and forces it onto the other
end of the resistor string. Both reference amplifiers are offset
trimmed during manufacturing in order to increase the
accuracy of the HI-7153 and to simplify its usage.
DIP
PIN
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
SYMBOL
HOLD
EOC
OVR
GND
BUS
HBE
CLK
DG
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
V+
V-
Bus select input. High = all outputs enabled
together D0-D9, OVR Low = Outputs enabled
by HBE
Byte select (HBE/LBE) input for 8 bit bus.
High = High byte select, D8 - D9, OVR Low =
Low byte select, D0 - D7
Clock input. TTL compatible.
Digital ground (0V)
End-of-conversion status. Pulses high at the
end-of-conversion.
Start of conversion status. Pulses low at the
start-of-conversion.
Bit 0 (LSB)
Bit 1
Bit 2 Output
Bit 3 Data
Bit 4 Bits
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9 (MSB)
Out of Range flag. Valid at end of conversion
when output exceeds full scale.
Positive supply voltage input (+5.0V)
Ground return for comparators (0V)
Negative supply voltage input (-5.0V)
DESCRIPTION