AD7277BRM AD [Analog Devices], AD7277BRM Datasheet
AD7277BRM
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AD7277BRM Summary of contents
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Preliminary Technical Data FEATURES Fast Throughput Rate: 3MSPS Specified for 3.6V DD Low Power: 13.5 mW max at 3MSPS with 3V Supplies TBD mW typ at 1.5MSPS with 3V Supplies Wide Input Bandwidth: 70dB SNR ...
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PRELIMINARY TECHNICAL DATA AD7278-SPECIFICATIONS Parameter DYNAMIC PERFORMANCE Signal-to-Noise + Distortion (SINAD) 2 Total Harmonic Distortion (THD) Peak Harmonic or Spurious Noise (SFDR) Intermodulation Distortion (IMD) Second Order Terms Third Order Terms Aperture Delay Aperture Jitter Full Power Bandwidth Full Power ...
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PRELIMINARY TECHNICAL DATA AD7277-SPECIFICATIONS Parameter DYNAMIC PERFORMANCE Signal-to-Noise + Distortion (SINAD) 2 Total Harmonic Distortion (THD) Peak Harmonic or Spurious Noise (SFDR) Intermodulation Distortion (IMD) Second Order Terms Third Order Terms Aperture Delay Aperture Jitter Full Power Bandwidth Full Power ...
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PRELIMINARY TECHNICAL DATA AD7276-SPECIFICATIONS Parameter DYNAMIC PERFORMANCE Signal-to-Noise + Distortion (SINAD) Signal-to-Noise Ratio (SNR) Total Harmonic Distortion (THD) Peak Harmonic or Spurious Noise (SFDR) Intermodulation Distortion (IMD) Second Order Terms Third Order Term Aperture Delay Aperture Jitter Full Power Bandwidth ...
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PRELIMINARY TECHNICAL DATA Preliminary Technical Data TIMING SPECIFICATIONS Limit MIN MAX Parameter AD7276/AD7277/AD7278 SCLK CONVERT SCLK SCLK SCLK ...
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PRELIMINARY TECHNICAL DATA AD7276/AD7277/AD7278 Figures 5 and 6 show some of the timing parameters from the Timing Specifications table. & SCLK ZERO DB11 SDATA THREE- 2 LEADING STATE ZERO’S Timing Example 1 ...
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... Model Range AD7276BUJ-REEL –40°C to +85°C AD7276BRM –40°C to +85°C AD7277BUJ-REEL –40°C to +85°C AD7277BRM –40°C to +85°C AD7278BUJ-REEL –40°C to +85°C AD7278BRMJ –40°C to +85° Linearity error here refers to integral nonlinearity. ...
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PRELIMINARY TECHNICAL DATA AD7276/AD7277/AD7278 Pin Mnemonic Function C S Chip Select. Active low logic input. This input provides the dual function of initiating conversion on the AD7276/AD7277/AD7278 and also frames the serial data transfer. V Power Supply Input. The V ...
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PRELIMINARY TECHNICAL DATA Preliminary Technical Data TERMINOLOGY Integral Nonlinearity This is the maximum deviation from a straight line pass- ing through the endpoints of the ADC transfer function. For the AD7276/AD7277/AD7278, the endpoints of the transfer function are zero scale, ...
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PRELIMINARY TECHNICAL DATA AD7276/AD7277/AD7278 PERFORMANCE CURVES Dynamic Performance curves TPC 1, TPC 2 and TPC 3 show typical FFT plots for the AD7276, AD7277 and AD7278 respectively MSPS sample rate and TBD KHz input tone. TPC 4 shows ...
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PRELIMINARY TECHNICAL DATA Preliminary Technical Data TBD 0 0 TITLE TPC 3. AD7278 Dynamic performance at 3 MSPS TBD 0 0 TITLE TPC 4. AD7276 SINAD vs Analog Input Frequency at 3 MSPS for various Supply Voltages TBD 0 0 ...
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PRELIMINARY TECHNICAL DATA AD7276/AD7277/AD7278 TBD 0 0 TITLE TPC 9. AD7276 DNL performance Preliminary Technical Data TBD 0 0 TITLE TPC 10. Maximum current vs Supply voltage for different SCLK frequencies. –12– REV. PrF ...
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PRELIMINARY TECHNICAL DATA Preliminary Technical Data CIRCUIT INFORMATION The AD7276/AD7277/AD7278 are fast, micropower, 12-/ 10-/8-Bit, single supply, A/D converters respectively. The parts can be operated from a +2.35V to +3.6V supply. When operated from any supply voltage within this range, ...
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AD7276/AD7277/AD7278 TYPICAL CONNECTION DIAGRAM Figure 10 shows a typical connection diagram for the AD7276/AD7277/AD7278 taken internally from REF V and as such V should be well decoupled. This DD DD provides an analog input range ...
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PRELIMINARY TECHNICAL DATA Preliminary Technical Data Table II provides some typical performance data with various op-amps used as the input buffer under the same set-up conditions. Op-amp in the AD7276 SNR Performance input buffer TBD kHz Input AD8510 TBD dB ...
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PRELIMINARY TECHNICAL DATA AD7276/AD7277/AD7278 Power-Down Mode This mode is intended for use in applications where slower throughput rates are required; either the ADC is powered down between each conversion series of conversions may be performed at a high ...
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PRELIMINARY TECHNICAL DATA Preliminary Technical Data Power-up Time The power-up time of the AD7276/AD7277/AD7278 is TBD ns, which means that with any frequency of SCLK MHz, one dummy cycle will always be sufficient to allow the device ...
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PRELIMINARY TECHNICAL DATA AD7276/AD7277/AD7278 SERIAL INTERFACE Figures 16, 17 and 18 show the detailed timing diagram for serial interfacing to the AD7276, AD7277 and AD7278 respectively. The serial clock provides the conversion clock and also controls the transfer of information ...
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PRELIMINARY TECHNICAL DATA Preliminary Technical Data & SCLK DB9 Z ZERO SDATA THREE- STATE 2 LEADI NG ZERO’S & SCLK ZERO DB7 SDATA THREE- 2 LEADI NG ...
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PRELIMINARY TECHNICAL DATA AD7276/AD7277/AD7278 6-Lead Thin Small Outline Transistor Package [TSOT BSC PIN .10 MAX COMPLIANT TO JEDEC STANDARDS MO-193AA 0.006 (0.15) 0.002 (0.05) COMPLIANT TO ...