AD5110BCPZ10-1-RL7 AD [Analog Devices], AD5110BCPZ10-1-RL7 Datasheet - Page 6

• Manufacturer Part Number: AD5110BCPZ10-1-RL7
• Manufacturer: AD [Analog Devices]

AD5110/AD5112/AD5114
Parameter
POWER SUPPLIES
DYNAMIC CHARACTERISTICS
FLASH/EE MEMORY RELIABILITY
1
2
3
4
5
6
7
8
9
10
11
Typical values represent average readings at 25°C, V
Resistor position nonlinearity error (R-INL) is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. The maximum wiper current is limited to 0.75 × V
Guaranteed by design and characterization, not subject to production test.
INL and DNL are measured at V
of ±1 LSB maximum are guaranteed monotonic operating conditions.
Resistor Terminal A, Resistor Terminal B, and Resistor Terminal W have no limitations on polarity with respect to each other.
Different from operating current; supply current for NVM program lasts approximately 30 ms.
Different from operating current; supply current for NVM read lasts approximately 20 μs.
P
All dynamic characteristics use V
derates with junction temperature in the Flash/EE memory.
Endurance is qualified at 100,000 cycles per JEDEC Standard 22, Method A117 and measured at 150°C.
Retention lifetime equivalent at junction temperature (T
DISS
Single-Supply Power Range
Logic Supply Range
Positive Supply Current
EEMEM Store Current
EEMEM Read Current
Logic Supply Current
Power Dissipation
Power Supply Rejection
Bandwidth
Total Harmonic Distortion
V
Resistor Noise Density
Endurance
Data Retention
W
is calculated from (I
Settling Time
10
11
8
DD
3
3
, 7
× V
, 6
3
DD
WB
3
) + (I
, 9
DD
with the RDAC configured as a potentiometer divider similar to a voltage output DAC. V
3
= 5.5 V, and V
LOGIC
× V
LOGIC
).
LOGIC
Symbol
I
I
THD
t
e
I
I
P
PSR
BW
DD
DD_NVM_STORE
DD_NVM_READ
LOGIC
s
DISS
N_WB
DD
= 5 V.
= 5 V, V
J
) = 125°C per JEDEC Standard 22, Method A117. Retention lifetime based on an activation energy of 1 eV
SS
= 0 V, and V
Rev. 0 | Page 6 of 28
Test Conditions/Comments
V
V
V
∆V
R
R
R
Code = half scale − 3 dB
R
R
R
V
V
code = half scale
R
R
R
V
±0.5 LSB error band
R
R
R
Code = half scale, T
f = 100 kHz
R
R
R
T
LOGIC
AB
AB
AB
AB
AB
AB
AB
AB
AB
AB
AB
AB
AB
AB
AB
A
DD
IH
IH
A
B
A
= V
= 25°C
DD
= V
= 5 V, V
= V
= V
= 5 kΩ
= 80 kΩ
= 5 kΩ
=10 kΩ
= 80 kΩ
= 5 kΩ
= 10 kΩ
= 80 kΩ
= 10 kΩ
= 5 kΩ
= 10 kΩ
= 80 kΩ
= 5 kΩ
= 10 kΩ
= 80 kΩ
= 5 V
/∆V
= 5 V.
DD
DD
LOGIC
LOGIC
/2, f = 1 kHz,
/2 + 1 V rms,
SS
= 5 V ± 10%
B
or V
or V
= 0 V,
IL
IL
= GND
= GND
A
= 25°C,
Min
2.3
1.8
100
A
= V
DD
Typ
750
2
320
30
5
−43
−50
−64
4
2
200
−75
−80
−85
2.5
3
10
7
9
20
1
50
and V
1
B
= 0 V. DNL specification limits
Max
5.5
V
DD
Data Sheet
DD
/R
AB
.
Unit
V
V
nA
mA
μA
nA
μW
dB
dB
dB
MHz
MHz
kHz
dB
dB
dB
μs
μs
μs
μs
nV/√Hz
nV/√Hz
nV/√Hz
MCycles
kCycles
Years