ADV7174BCP-REEL AD [Analog Devices], ADV7174BCP-REEL Datasheet - Page 21
ADV7174BCP-REEL
Manufacturer Part Number
ADV7174BCP-REEL
Description
Chip Scale PAL/NTSC Video Encoder with Advanced Power Management
Manufacturer
AD [Analog Devices]
Datasheet
1.ADV7174BCP-REEL.pdf
(52 pages)
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Mode 1: Master Option HSYNC , BLANK , FIELD
(Timing Register 0 TR0 = X X X X X 0 1 1)
In this mode, the ADV7174/ADV7179 can generate horizontal
SYNC and odd/even FIELD signals. A transition of the FIELD
input when HSYNC is low indicates a new frame, i.e., vertical
retrace. The BLANK signal is optional. When the BLANK input
HSYNC
BLANK
FIELD
PIXEL
DATA
NTSC = 16 × CLOCK/2
PAL = 12 × CLOCK/2
Figure 26. Timing Mode 1 Odd/Even Field Transitions Master/Slave
Rev. A | Page 21 of 52
is disabled, the ADV7174/ADV7179 automatically blanks all
normally blank lines as per CCIR-624. Pixel data is latched on
the rising clock edge following the timing signal transitions.
Mode 1 is illustrated in Figure 24 (NTSC) and Figure 25 (PAL).
Figure 26 illustrates the HSYNC , BLANK , and FIELD for an
odd or even field transition relative to the pixel data.
PAL = 132 × CLOCK/2
NTSC = 122 × CLOCK/2
Cb
Y
Cr
ADV7174/ADV7179
Y
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