AD5113 AD [Analog Devices], AD5113 Datasheet - Page 13

• Manufacturer Part Number: AD5113
• Manufacturer: AD [Analog Devices]

Data Sheet
THEORY OF OPERATION
The
operate as a true variable resistor for analog signals within
the terminal voltage range of GND < V
wiper position is determined by the RDAC register contents.
The RDAC register is a standard logic register; there is no
restriction on the number of changes allowed.
The RDAC register can be programmed with any position
setting using the push button interface. Once a desirable wiper
position is found, this value can be stored in the EEPROM
memory. Thereafter, the wiper position is always restored to
that position for subsequent power-up. The storing of EEPROM
data takes approximately 20 ms; during this time, the device
is locked and does not accept any new operation, thus
preventing any changes from taking place.
The
(tactile switches) directly, as shown in Figure 1.
RDAC REGISTER
The RDAC register directly controls the position of the digital
potentiometer wiper. For example, when the RDAC register
is 0x20, the wiper is connected to midscale of the variable
resistor. The RDAC register is controlled using the PD and PU
push buttons. The step-up and step-down operations require
the activation of the PU (push-up) and PD (push-down) pins.
These pins have 100 kΩ internal pull-up resistors that PU and
PD activate at logic high. The following paragraphs explain how
to increment the RDAC register, but all the descriptions are
valid to decrement the RDAC register, swapping PU by PD.
Manual Increment
The
duration of the logic high level of PU signal between bounces. If
the PU logic high level signal duration is shorter than 8 ms, the
debouncer ignores it as an invalid incrementing command.
Whenever the logic high level of PU signal lasts longer than
8 ms, the debouncer assumes that the last bounce is met and,
therefore, increments the RDAC register by one step. The wiper
is incremented by one tap position, as shown in Figure 2.
Auto Scan Increment
If the PU button is held for longer than 1 second, continuously
holding it activates auto scan mode, and the
the RDAC register by one step every 140 ms until PU is
released. Typical timing is shown in Figure 3.
Low Wiper Resistance Feature
The
resistance. Between Terminal W and Terminal B, this extra step
is called bottom scale and the wiper resistance decreases from
70 Ω to 45 Ω. Between Terminal A and Terminal W, this extra
step is called top scale and connects the A and W terminals,
reducing the 1 LSB resistor typical at full-scale code. These new
extra steps are loaded automatically in the RDAC register after
zero-scale or full-scale position has been reached. The extra
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digital programmable resistor is designed to
is designed to support external push buttons
features an adaptive debouncer that monitors the
includes extra steps to achieve a minimum wiper
TERM
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< V
DD
. The resistor
increments
Rev. 0 | Page 13 of 16
steps are not equal to 1 LSB, and are not included in the INL,
DNL, R-INL, and R-DNL specifications.
Whenever the minimum R
stops decrementing. Any continuous holding of the PD to logic
high simply elevates the supply current. When R
minimum resistance (= R
elevates the supply current.
EEPROM
The
wiper position storage. Once a desirable wiper position is
found, this value can be saved into the EEPROM. Thereafter,
the wiper position will always be set at that position for any
future on-off-on power supply sequence.
AUTOMATIC SAVE ENABLE
At power-up, the
pin is pulled low, as shown in Figure 38, the automatic store is
enabled. If the pin is pulled high, as shown in Figure 39,
automatic store is disabled and the RDAC register should be
stored manually. During the storage cycle, the device is locked
and does not accept any new operation preventing any changes
from taking place.
Auto Save
If there is no activity on inputs during 1 second, the
stores the RDAC register data into EEPROM, as shown in
Figure 4.
Manual Store
The storage is controlled by the ASE pin, which is connected to
an adaptive debouncer. If the ASE pin is pulled low longer than
8 ms, the
as shown in Figure 5.
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Figure 39. Automatic Store Disables with Manual Storage
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contains an EEPROM memory that allows
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Figure 38. Automatic Store Enables
saves the RDAC register data into EEPROM,
100kΩ
100kΩ
TS
ASE
checks the level in the ASE pin. If the
WB
Push Button
), continuous holding of PU only
(= R
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ASE
BS
V
) is reached, the resistance
DD
GND
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V
DD
AW
reaches the
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