AD5424YCPZ-REEL AD [Analog Devices], AD5424YCPZ-REEL Datasheet - Page 17
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AD5424YCPZ-REEL
Manufacturer Part Number
AD5424YCPZ-REEL
Description
8-/10-/12-Bit, High Bandwidth Multiplying DACs with Parallel Interface
Manufacturer
AD [Analog Devices]
Datasheet
1.AD5424YCPZ-REEL.pdf
(32 pages)
THEORY OF OPERATION
The AD5424, AD5433, and AD5445 are 8-, 10-, and 12-bit
current output DACs consisting of a standard inverting R-2R
ladder configuration. A simplified diagram for the 8-bit
AD5424 is shown in Figure 48. The matching feedback resistor
R
mum 8 kΩ and maximum 12 kΩ). If I
the same potential, a constant current flows in each ladder leg,
regardless of digital input code. Therefore, the input resistance
presented at V
value R. The DAC output (I
various resistances and capacitances. External amplifier choice
should take into account the variation in impedance generated
by the DAC on the amplifiers inverting input node.
Access is provided to the V
the DAC, making the device extremely versatile and allowing it
to be configured in several different operating modes, for
example, to provide a unipolar output, 4-quadrant multipli-
cation in bipolar mode or in single-supply modes of operation.
Note that a matching switch is used in series with the internal
R
must be applied to V
CIRCUIT OPERATION
Unipolar Mode
Using a single op amp, these devices can easily be configured to
provide 2-quadrant multiplying operation or a unipolar output
voltage swing, as shown in Figure 49.
When an output amplifier is connected in unipolar mode, the
output voltage is given by
FB
FB
has a value of R. The value of R is typically 10 kΩ (mini-
feedback resistor. If users attempt to measure R
V
OUT
V
REF
=
−
REF
V
REF
2R
S1
DAC DATA LATCHES
is always constant and nominally of resistance
R
AND DRIVERS
×
Figure 48. Simplified Ladder
DD
2
D
2R
S2
n
R
to achieve continuity.
REF
S3
OUT
2R
, R
) is code-dependent, producing
R
FB
, I
S8
2R
OUT
OUT
1, and I
2R
1 and I
R
OUT
OUT
R
I
I
OUT
OUT
FB
2 terminals of
A
FB
2 are kept at
1
2
, power
Rev. B | Page 17 of 32
where D is the fractional representation of the digital word
loaded to the DAC and n is the resolution of the DAC.
Note that the output voltage polarity is opposite to the V
polarity for dc reference voltages.
These DACs are designed to operate with either negative or
positive reference voltages. The V
the internal digital logic to drive the DAC switches’ on and
off states.
These DACs are also designed to accommodate ac reference
input signals in the range of –10 V to +10 V.
With a fixed 10 V reference, the circuit shown in Figure 49 gives
a unipolar 0 V to –10 V output voltage swing. When V
signal, the circuit performs 2-quadrant multiplication.
Table 7 shows the relationship between digital code and
expected output voltage for unipolar operation (AD5424,
8-bit device).
Table 7. Unipolar Code Table
Digital Input
1111 1111
1000 0000
0000 0001
0000 0000
V
REF
D = 0 to 255 (8-bit AD5424)
NOTES:
1.
2.
R1
= 0 to 1023 (10-bit AD5433)
= 0 to 4095 (12-bit AD5445)
R1 AND R2 USED ONLY IF GAIN ADJUSTMENT IS REQUIRED.
C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED
IF A1 IS A HIGH SPEED AMPLIFIER.
V
INPUTS
DATA
REF
AD5424/
AD5433/
R/W
AD5445
Figure 49. Unipolar Operation
V
V
DD
DD
CS
AD5424/AD5433/AD5445
R
GND
FB
I
I
OUT
OUT
Analog Output (V)
–V
–V
V
V
DD
1
2
REF
REF
R2
REF
REF
power pin is only used by
(1/256)
(0/256) = 0
(255/256)
(128/256) = –V
C1
AGND
A1
V
0 TO –V
REF
OUT
IN
/2
=
REF
is an ac
REF