DAC8222BTC/883 AD [Analog Devices], DAC8222BTC/883 Datasheet - Page 4

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DAC8222BTC/883

Manufacturer Part Number
DAC8222BTC/883
Description
Dual 12-Bit Double-Buffered Multiplying CMOS D/A Converter
Manufacturer
AD [Analog Devices]
Datasheet
DICE CHARACTERISTICS
DAC8222
WAFER TEST LIMITS
Parameter
Relative Accuracy
Differential Nonlinearity
Full Scale Gain Error
Output Leakage
Input Resistance
Input Resistance Match
Digital Input High
Digital Input Low
Digital Input Current
Supply Current
DC Supply Rejection
NOTES
1
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.
Measured using internal R
(I
(V
(∆Gain/∆V
OUT A
REF A
, I
, V
OUT B
REF B
DD
)
)
)
×
1
FB A
×
and R
FB B
G
I
R
∆R
R
V
V
I
(@ V
Symbol
INL
DNL
I
PSR
LKG
IN
DD
REF
REF
INH
INL
.
FSE
REF
DD
= +5 V or +15 V, V
Conditions
Endpoint Linearity Error
All Grades are Guaranteed Monotonic
Digital Inputs = 1111 1111 1111
Digital Inputs = 0000 0000 0000
Pads 2 and 24
Pads 4 and 22
V
V
V
V
V
All Digital Inputs V
All Digital Inputs 0 V or V
∆V
DD
DD
DD
DD
IN
DD
= 0 V or V
= +5 V
= +15 V
= +5 V
= +15 V
REF A
= ± 5%
= V
REF B
DD
= +10 V, V
; V
11. AGND
12. I
13. R
14. V
15. DGND
16. DB11(MSB)
17. DB10
18. DB9
19. DB8
10. DB7
11. DB6
12. DB5
Substrate (die backside) is internally connected to V
INL
INL
or V
OUT A
or V
FB A
REF A
DD
OUT A
INH
INH
= V
OUT B
= 0 V; AGND = DGND = 0 V; T
DAC8222G
Limit
± 1
± 1
± 4
± 50
8/15
± 1
2.4
13.5
0.8
1.5
± 1
2
0.1
0.002
17. DB0 (LSB)
18. DAC A/DAC B
22. V
23. R
24. I
13. DB4
14. DB3
15. DB2
16. DB1
19. LDAC
20. WR
21. V
OUT B
DD
REF B
FB B
A
= +25 C)
Units
LSB max
LSB max
LSB max
nA max
kΩ max
% max
V min
V min
V max
V min
µA max
mA max
%/% max
DD
.

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