ISL78200AVEZ INTERSIL [Intersil Corporation], ISL78200AVEZ Datasheet - Page 16

• Manufacturer Part Number: ISL78200AVEZ
• Description: 2.5A Regulator with Integrated High-Side MOSFET for Synchronous Buck or Boost Buck Converter
• Manufacturer: INTERSIL [Intersil Corporation]

Oscillator and Synchronization
The oscillator has a default frequency of 500kHz with the FS pin
connected to VCC, ground, or floating. The frequency can be
programmed to any frequency between 200kHz and 2.2MHz with
a resistor from the FS pin to GND.
R
With the SYNC pins simply connected together, multiple
ISL78200s can be synchronized. The slave ICs automatically
have 180 degree phase shift with respect to the master IC.
With an external square pulse waveform (with frequency 10%
higher than the local frequency, 10% to 90% duty cycle and pulse
width higher than 150ns) on the SYNC pin, the ISL78200 will
synchronize its switching frequency to the fundamental
frequency of the input waveform. The internal oscillator
synchronizes with the leading edge of the input signal. The rising
edge of UGATE PWM is delayed by 180 degrees from the leading
edge of the external clock signal.
Fault Protection
Overcurrent Protection
The overcurrent function protects against any overload condition
and output shorts at worst case, by monitoring the current
flowing through the upper MOSFET.
There are 2 current limiting thresholds. The first one, I
limit the high-side MOSFET peak current cycle-by-cycle. The
current limit threshold is set to default at 3.6A with the ILIMIT pin
connected to GND or VCC, or left open. The current limit threshold
can also be programmed by a resistor, R
ground. Use Equation 10 to calculate the resistor.
R
Note that with the lower R
maximum 5.4A with R
default value of 3.6A (TYP).
LIM
FS
1200
1000
[
800
600
400
200
kΩ
=
0
0
]
-------------------------------------- -
I
OC
=
300000
A [ ]
145000 16 FS
------------------------------------------------------------- -
+
0.018
500
FIGURE 29. R
FS kHz
–
[
LIM
⋅
]
LIM
at 54.9k (TYP), the OC limit goes to its
[
1000
kHz
, I
16
FS
OC1
F
]
S
vs FREQUENCY
(kHz)
is higher. I
1500
LIM
, at the ILIMIT pin to
OC1
2000
reaches its
OC1
, is to
(EQ. 10)
ISL78200
(EQ. 9)
2500
The second current protection threshold, I
than I
current reaches I
the IC enters hiccup mode. In hiccup mode, the PWM is disabled
for a dummy soft-start duration equal to 5 regular soft-start
periods. After this dummy soft-start cycle, the true soft-start cycle
is attempted again. The I
protection against worst case conditions.
The frequency fold back is implemented for the ISL78200. When
overcurrent limiting, the switching frequency is reduced to
proportional to the output voltage in order to keep the inductor
current under the limit threshold during overload condition. The
low limit of frequency under frequency foldback is 40kHz.
Overvoltage Protection
If the voltage detected on the FB pin is over 110% of reference,
the high-side and low-side drivers shut down immediately and
won’t be allowed on until the FB voltage falls down to 0.8V. When
the FB voltage drops to 0.8V, the drivers are released on. If the
120% overvoltage threshold is reached, the high-side and
low-side driver shut down immediately and the IC is latched off.
The IC has to be reset for restart.
Thermal Protection
The ISL78200 PWM will be disabled if the junction temperature
reaches +155°C. A +15°C hysteresis insures that the device will
not restart until the junction temperature drops below +140°C.
Component Selections
Output Capacitors
Output capacitors are required to filter the inductor current and
supply the load transient current.
All ceramic output capacitors are achievable with this IC. Also, in
applications the aluminum electrolytic type capacitor provides
better load transient and longer holdup time for the load. When
low cost, high ESR aluminum capacitors are used at the output, a
ceramic capacitor (2.2µF to 10µF) is recommended to handle
the ripple current and reduce the total equivalent ESR effectively.
370
320
270
220
170
120
OC1
70
0.0
mentioned above. At the instant the high-side MOSFET
1.0
OC2
FIGURE 30.
, the PWM shuts off after a 2 cycle delay and
OC2
2.0
offers a robust and reliable
I
R
OC1
LIM
3.0
(A)
vs I OC1
OC2
4.0
, is 15% higher
September 22, 2011
5.0
FN7641.0
6.0