ISL78205AVEZ INTERSIL [Intersil Corporation], ISL78205AVEZ Datasheet - Page 14

• Manufacturer Part Number: ISL78205AVEZ
• Description: 2.5A Buck Controller with Integrated High-Side MOSFET
• Manufacturer: INTERSIL [Intersil Corporation]

Input Capacitors
Depending upon the system input power rail conditions, the
aluminum electrolytic type capacitor is normally needed to
provide the stable input voltage and restrict the switching
frequency pulse current in small areas over the input traces for
better EMC performance. The input capacitor should be able to
handle the RMS current from the switching power devices.
Ceramic capacitors must be used at the VIN pin of the IC and
multiple capacitors, including 1µF and 0.1µF, are recommended.
Place these capacitors as closely as possible to the IC.
Output Inductor
Generally the inductor should filter the current ripple to be
30~40% of the regulator’s maximum average output current.
The low DCR inductor should be selected for the highest
efficiency. In addition, the inductor saturation current rating
should be higher than the highest transient expected.
Low Side Power MOSFET
In synchronous buck applications, a power N MOSFET is needed
as the synchronous low side MOSFET and it must have low
r
(Vgth_min ≥ 1.2V) and Qgd. A good example is BSZ100N06LS3G.
Output Voltage Feedback Resistor Divider
The output voltage can be programmed down to 0.8V by a
resistor divider from V
V
In applications requiring the least input quiescent current, large
resistors should be used for the divider to keep its leakage
current low. 232k is a recommended for the upper resistor.
Compensation Network
With peak current mode control, type II compensation is
normally used for most applications. However, in applications
seeking achieve higher bandwidth, type III compensation is good
to use.
DS(ON)
OUT
=
, lowest Rg (Rg_typ < 1.5
0.8
⋅
⎛
⎜
⎝
1
+
-------------- -
R
R
LOW
UP
OUT
⎞
⎟
⎠
to FB, according to Equation 4.
14
Ω
recommended
)
, Vgth
ISL78205
(EQ. 4)
Layout Suggestions
1. Place the input ceramic capacitors as close as possible to the
IC VIN pin and power ground connecting to the power MOSFET or
diode. Keep this loop (input ceramic capacitor, IC VIN pin and
MOSFET/Diode) as tiny as possible to achieve the least voltage
spikes induced by the trace parasitic inductance.
2. Place the input aluminum capacitors close to the IC VIN pin.
3. Keep the phase node copper area small, but large enough to
handle the load current.
4. Place the output ceramic and aluminum capacitors also close
to the power stage components.
5. Put vias (≥15) in the bottom pad of the IC. The bottom pad
should be placed in the ground copper plane with area as large
as possible in multiple layers to effectively reduce the thermal
impedance.
6. Place the 4.7µF ceramic decoupling capacitor at the VCC pin
and as close as possible to the IC. Put multiple vias (≥3) close to
the ground pad of this capacitor.
7. Keep the bootstrap capacitor close to the IC.
8. Keep the LGATE drive trace as short as possible and try to
avoid using via in LGATE drive path to achieve the lowest
impedance.
9. Place the positive voltage sense trace close to the load for
tighter regulation.
10. Put all the peripheral control components close to the IC.
FIGURE 18. PCB VIA PATTERN
September 22, 2011
FN7926.0