EPM2210F100A ALTERA [Altera Corporation], EPM2210F100A Datasheet - Page 81

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EPM2210F100A

Manufacturer Part Number
EPM2210F100A
Description
MAX II Device Family
Manufacturer
ALTERA [Altera Corporation]
Datasheet
Chapter 5: DC and Switching Characteristics
Timing Model and Specifications
JTAG Timing Specifications
Figure 5–6. MAX II JTAG Timing Waveforms
Table 5–31. MAX II JTAG Timing Parameters (Part 1 of 2)
© Novermber 2008 Altera Corporation
t
t
t
t
t
t
t
t
t
t
t
JCP
JCH
JCL
JPSU
JPH
JPCO
JPZX
JPXZ
JSSU
JSH
JSCO
(1)
Symbol
TCK clock period for V
TCK clock period for V
TCK clock period for V
TCK clock period for V
TCK clock high time
TCK clock low time
JTAG port setup time
JTAG port hold time
JTAG port clock to output
JTAG port high impedance to valid output
JTAG port valid output to high impedance
Capture register setup time
Capture register hold time
Update register clock to output
Captured
Figure 5–6
Table 5–31
Driven
Signal
Signal
to be
to be
TMS
TDO
TCK
TDI
shows the timing waveforms for the JTAG signals.
shows the JTAG Timing parameters and values for MAX II devices.
t
JCH
t
Parameter
JPZX
t
JSZX
t
(2)
JCP
CCIO1
CCIO1
CCIO1
CCIO1
t
JSSU
(2)
t
= 3.3 V
= 2.5 V
= 1.8 V
= 1.5 V
JCL
t
JSH
t
t
JPCO
JSCO
(2)
(2)
t
JPSU
55.5
62.5
Min
100
143
20
20
10
10
8
8
t
JSXZ
t
JPH
Max
15
15
15
25
t
JPXZ
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MAX II Device Handbook
5–23

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