ATF1508ASZ-20AC100 ATMEL [ATMEL Corporation], ATF1508ASZ-20AC100 Datasheet

no-image

ATF1508ASZ-20AC100

Manufacturer Part Number
ATF1508ASZ-20AC100
Description
High Performance E2 PLD
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Features
Enhanced Features
High Density, High Performance Electrically Erasable Complex
Programmable Logic Device
Flexible Logic Macrocell
Advanced Power Management Features
Available in Commercial and Industrial Temperature Ranges
Available in 84-pin PLCC and 100-pin PQFP and TQFP and
160-pin PQFP Packages
Advanced Flash Technology
JTAG Boundary-Scan Testing to IEEE Std. 1149.1-1990 and 1149.1a-1993 Supported
Fast In-System Programmability (ISP) via JTAG
PCI-compliant
3.3 or 5.0V I/O pins
Security Fuse Feature
Improved Connectivity (Additional Feedback Routing, Alternate Input Routing)
Output Enable Product Terms
D - Latch Mode
Combinatorial Output with Registered Feedback within any Macrocell
Three Global Clock Pins
ITD ( Input Transition Detection) Circuits on Global Clocks, Inputs and I/O
Fast Registered Input from Product Term
Programmable “Pin-Keeper” Option
V
Pull-Up Option on JTAG Pins TMS and TDI
Advanced Power Management Features
CC
– 128 Macrocells
– 5 Product Terms per Macrocell, Expandable up to 40 per Macrocell
– 68, 84, 100, 160-pins
– 7.5 ns Maximum Pin-to-Pin Delay
– Registered Operation Up To 125 MHz
– Enhanced Routing Resources
– D/T/Latch Configurable Flip Flops
– Global and Individual Register Control Signals
– Global and Individual Output Enable
– Programmable Output Slew Rate
– Programmable Output Open Collector Option
– Maximum Logic utilization by burying a register within a COM output
– Automatic 100 A Stand-By for “Z” Version (Max.)
– Pin-Controlled 100 A Stand-By Mode (Typical)
– Programmable Pin-Keeper Inputs and I/Os
– Reduced-Power Feature Per Macrocell
– 100% Tested
– Completely Reprogrammable
– 100 Program/Erase Cycles
– 20 Year Data Retention
– 2000V ESD Protection
– 200 mA Latch-Up Immunity
– Edge Controlled Power Down “Z”
– Individual Macrocell Power Option
– Disable ITD on Global Clocks, Inputs and I/O for “Z” Parts
Power-Up Reset Option
High
Performance
E
ATF1508AS/Z
2
PLD
Rev. 0784C–4/98
1

Related parts for ATF1508ASZ-20AC100

ATF1508ASZ-20AC100 Summary of contents

Page 1

Features • High Density, High Performance Electrically Erasable Complex Programmable Logic Device – 128 Macrocells – 5 Product Terms per Macrocell, Expandable per Macrocell – 68, 84, 100, 160-pins – 7.5 ns Maximum Pin-to-Pin Delay – Registered ...

Page 2

PLCC Top View I/O/PD1 12 VCCIO 13 I/O/TDI 14 I/O 15 I/O 16 I/O 17 I/O 18 GND 19 I/O 20 I/O 21 I/O 22 I/O/TMS 23 I/O 24 I/O 25 VCCIO 26 I/O 27 I/O 28 I/O 29 ...

Page 3

Block Diagram ...

Page 4

Description The ATF1508AS is a high performance, high density Com- plex Programmable Logic Device (CPLD) which utilizes Atmel’s proven electrically erasable Flash memory technol- ogy. With 128 logic macrocells and up to 100 inputs, it eas- ily integrates logic from ...

Page 5

CASCADE logic. The output enable for each macrocell can be selected as one of the global OUTPUT enable signals. The device has six global OE signals. Global Bus/Switch Matrix The global bus contains all ...

Page 6

Figure 1. ATF1508AS Macrocell Programmable Pin-Keeper Option for Inputs and I/Os The ATF1508AS offers the option of programming all input and I/O pins so that “pin keeper” circuits can be utilized. When any pin is driven high or low and ...

Page 7

All ATF1508s also have an optional power down mode. In this mode, current drops to below 10 mA. When the power down option is selected, either PD1 or PD2 pins (or both) can be used to power down the part. ...

Page 8

DC and AC Operating Conditions Operating Temperature (Case) V INT (5V) Power Supply (3.3V) Power Supply CC DC Characteristics Symbol Parameter Input or I/O Low I IL Leakage Current Input or I/O High ...

Page 9

Absolute Maximum Ratings* Temperature Under Bias .................................. -40°C to +85°C Storage Temperature ..................................... -65°C to +150°C Voltage on Any Pin with Respect to Ground .........................................-2.0V to +7.0V Voltage on Input Pins with Respect to Ground During Programming.....................................-2.0V to +14.0V Programming ...

Page 10

AC Characteristics Symbol Parameter F Maximum Clock Frequency MAX t Input Pad and Buffer Delay IN t I/O Input Pad and Buffer Delay IO t Fast Input Delay FIN t Foldback Term Delay SEXP t Cascade Logic Delay PEXP t ...

Page 11

AC Characteristics Symbol Parameter Output Buffer Enable Delay t (Slow slew rate = OFF; ZX1 V = 5.0V pF) CCIO L Output Buffer Enable Delay t (Slow slew rate = OFF; ZX2 V = 3.3V ...

Page 12

Power Down Mode The ATF1508AS includes two pins for optional pin con- trolled power down feature. When this mode is enabled, the PD pin acts as the power down pin. When the PD1 and PD2 pin is high, the device ...

Page 13

JTAG-BST Overview The JTAG boundary-scan testing is controlled by the Test Access Port (TAP) controller in the ATF1508AS. The boundary-scan technique involves the inclusion of a shift- register stage (contained in a boundary-scan cell) adjacent to each component so that ...

Page 14

BSC Configuration for Macrocell OEJ OUTJ TDI Shift ATF1508AS/Z 14 Pin BSC 0 Pin 1 TDI Shift TDO Capture Update DR DR Clock Macrocell BSC TDO D Q ...

Page 15

PCI Compliance The ATF1508AS also supports the growing need in the industry to support the new Peripheral Component Inter- connect (PCI) interface standard in PCI-based designs and PCI Voltage-to-Current Curves for +5V Signaling in Pull-Up Mode Pull Up VCC 2.4 ...

Page 16

PCI AC Characteristics Symbol Parameter I Switching OH(AC) Current High (Test High) I Switching OL(AC) Current Low (Test Point) I Low Clamp Current CL SLEW Output Rise Slew Rate R SLEW Output Fall Slew Rate F Notes: 1. Equation A: ...

Page 17

ATF1508AS Dedicated Pinouts Dedicated Pin INPUT/OE2/GCLK2 INPUT/GCLR INPUT/OE1 INPUT/GCLK1 I/O /GCLK3 I (1, 2) I/O / TDI(JTAG) I/O / TMS(JTAG) I/O / TCK(JTAG) I/O / TDO(JTAG) 7,19,32,42, GND 47,59,72,82 VCCINT VCCIO N SIGNAL PINS # USER ...

Page 18

ATF1508AS I/O Pinouts 84-Pin 100-Pin MC PLB J-Lead PQFP PD1 ...

Page 19

ATF1508AS I/O Pinouts (Continued) 84-Pin 100-Pin MC PLB J-Lead PQFP PD2 ...

Page 20

SUPPLY CURRENT vs. SUPPLY VOLTAGE (TA = 25C) STANDARD POWER, MC POWER CONTROL BIT TO NORMAL 200 175 150 125 100 4.5 4.75 5 SUPPLY VOLTAGE (V) SUPPLY CURRENT vs. SUPPLY VOLTAGE (TA = 25C) STANDARD POWER, MC POWER CONTROL ...

Page 21

... ATF1508AS-15 QI100 ATF1508AS-15 AI100 ATF1508AS-15 QI160 ATF1508ASZ-20 JC84 ATF1508ASZ-20 QC100 ATF1508ASZ-20 AC100 ATF1508ASZ-20 QC160 ATF1508ASZ-25 JC84 ATF1508ASZ-25 QC100 ATF1508ASZ-25 AC100 ATF1508ASZ-25 QC160 ATF1508ASZ-25 JI84 ATF1508ASZ-25 QI100 ATF1508ASZ-25 AI100 ATF1508ASZ-25 QI160 Package Type Package Operation Range 84J Commercial 100Q1 ( 100A ...

Page 22

Packaging Information 84J, 84 Lead, Plastic J-Leaded Chip Carrier (PLCC) Dimensions in Inches and (Millimeters) JEDEC STANDARD MS-018 AF 100A, 100 Lead, Very Thin (1.0mm) Plastic Gull Wing Quad Flat Package (TQFP) Dimensions in Millimeters and (Inches)* 16.25(0.640) 15.75(0.620) PIN ...

Related keywords