ATF16V8CZ_05 ATMEL [ATMEL Corporation], ATF16V8CZ_05 Datasheet
ATF16V8CZ_05
Related parts for ATF16V8CZ_05
ATF16V8CZ_05 Summary of contents
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Features • Industry-standard Architecture – Emulates Many 20-pin PALs – Low-cost Easy-to-use Software Tools • High-speed Electrically-erasable Programmable Logic Devices – Maximum Pin-to-pin Delay • Low-power - 5 µA (Typ) Standby Current • CMOS and TTL Compatible Inputs ...
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Figure 1-1. Block Diagram 2. Pin Configuration and Pinouts Table 2-1. Pin Name CLK I I/O OE VCC Figure 2-1. Figure 2-2. ATF16V8CZ 2 Pinouts - All Pinouts Top View Function Clock Logic Inputs Bi-directional Buffers Output Enable +5V Supply ...
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Figure 2-3. 3. Absolute Maximum Ratings* Temperature Under Bias.................................. -40°C to +85°C Storage Temperature ..................................... -65°C to +150°C Voltage on Any Pin with Respect to Ground .........................................-2.0V to +7.0V Voltage on Input Pins with Respect to Ground During Programming.....................................-2.0V to ...
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DC Characteristics Symbol Parameter V Output High Voltage OH I Output Low Current OL I Output High Current OH Note: 1. All I parameters measured with outputs open. Data is based on Atmel test patterns. Reading may vary with ...
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AC Waveforms Note: 1. Timing measurement reference is 1.5V. Input AC driving levels are 0.0V and 3.0V, unless otherwise specified. 4.3 AC Characteristics Symbol Parameter t Input or Feedback to Non-registered Output PD t Clock to Feedback CF ...
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Input Test Waveforms 4.4.1 Input Test Waveforms and Measurement Levels < 1.5 ns (10 4.4.2 Output Test Loads Note: 4.4.3 Pin Capacitance Table 4- OUT Note: ATF16V8CZ 6 Similar ...
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Power-up Reset The ATF16V8CZ’s registers are designed to reset during power-up point delayed slightly from V CC put state will always be high on power-up. This feature is critical for state machine initialization. However, due to the ...
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Input and I/O Pin-keeper Circuits The ATF16V8CZ contains internal input and I/O pin-keeper circuits. These circuits allow each ATF16V8CZ pin to hold its previous value even when it is not being driven by an external source or by the ...
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Functional Logic Diagram Description The Logic Option and Functional Diagrams describe the ATF16V8CZ architecture. Eight config- urable macrocells can be configured as a registered output, combinatorial I/O, combinatorial output, or dedicated input. The ATF16V8CZ can be configured in one ...
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Macrocell Configuration Software compilers support the three different OMC modes as different device types. These device types are listed in the table below. Most compilers have the ability to automatically select the device type, generally based on the register ...
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Figure 8-1. Notes: Figure 8-2. Notes: 0453H–PLD–7/05 Registered Configuration for Registered Mode 1. Pin 1 controls common CLK for the registered outputs. Pin 11 controls common OE for the registered outputs. Pin 1 and Pin 11 are permanently configured as ...
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Figure 8-3. Registered Mode Logic Diagram ATF16V8CZ 12 0453H–PLD–7/05 ...
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ATF16V8CZ Complex Mode PAL Device Emulation/PAL Replacement. In the complex mode, combinatorial output and I/O functions are possible. Pins 1 and 11 are regular inputs to the array. Pins 13 through 18 have pin feedback paths back to the ...
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Figure 9-1. ATF16V8CZ 14 Simple Mode Option 0 1 0453H–PLD–7/05 ...
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Figure 9-2. Complex Mode Logic Diagram 0453H–PLD–7/05 ATF16V8CZ 15 ...
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Figure 9-3. Simple Mode Logic Diagram ATF16V8CZ 16 0453H–PLD–7/05 ...
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Test Characterization Data 0453H–PLD–7/05 ATF16V8CZ 17 ...
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ATF16V8CZ 18 0453H–PLD–7/05 ...
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ATF16V8CZ 19 ...
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Ordering Information 10.1 Standard Package Options (ns) (ns) (ns Note: Shaded parts are being obsoleted in Q3-05 and being replaced by Green parts. 10.2 Using ...
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Package Information 11.1 20J – PLCC 1.14(0.045) X 45˚ B 0.51(0.020)MAX 45˚ MAX (3X) Notes: 1. This package conforms to JEDEC reference MS-018, Variation AA. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is .010"(0.254 ...
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PDIP A SEATING PLANE Notes: 1. This package conforms to JEDEC reference MS-001, Variation AD. 2. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed ...
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SOIC Dimensions in Millimeters and (Inches). Controlling dimension: Inches. JEDEC Standard MS-013 PIN 1 ID 2325 Orchard Parkway San Jose, CA 95131 R 0453H–PLD–7/05 0.51(0.020) 0.33(0.013) PIN 1 1.27 (0.050) BSC 13.00 (0.5118) 12.60 (0.4961) 0.30(0.0118) 0.10 ...
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TSSOP Dimensions in Millimeters and (Inches). Controlling dimension: Millimeters. JEDEC Standard MO-153 AC 0.65 (.0256) BSC 0º ~ 8º 2325 Orchard Parkway San Jose, CA 95131 R ATF16V8CZ 24 PIN 1 4.50 (0.177) 4.30 (0.169) 6.60 (.260) ...
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Revision History 12.1 0453H 1. Green Package options added in 2005. 0453H–PLD–7/05 ATF16V8CZ 25 ...
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Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel: (41) 26-426-5555 Fax: (41) 26-426-5500 Asia Room 1219 ...