XC4VFX12 XILINX [Xilinx, Inc], XC4VFX12 Datasheet
XC4VFX12
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XC4VFX12 Summary of contents
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Virtex-4 User Guide R DS112 (v1.1) September 10, 2004 General Description The Virtex-4™ Family is the newest generation FPGA from Xilinx. The innovative Advanced Silicon Modular Block or ASMBL™ column-based architecture is unique in the programmable logic industry. Virtex-4 FPGAs ...
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... Slices Device Row x Col Cells Distributed RAM (Kb) XC4VSX25 23,040 10,240 XC4VSX35 34,560 15,360 XC4VSX55 128 x 48 55,296 24,576 XC4VFX12 12,312 5,472 XC4VFX20 19,224 8,544 XC4VFX40 41,904 15,552 XC4VFX60 128 x 52 56,880 25,280 XC4VFX100 160 x 68 94,896 ...
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R SelectIO Technology • 960 user I/Os • Wide selections of I/O standards from 1.5V to 3.3V • Extremely high-performance - 600 Mb/s HSTL & SSTL (on all single-ended I/ Gb/s LVDS (on all differential I/O ...
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Virtex-4 Family Overview Tri-mode Ethernet Media Access Controller • IEEE 802.3 compliant • Operates at 10, 100, and 1,000 Mb/s • Supports tri-mode auto-detect • Receive address filter (16 address entries) • Fully monolithic 1000Base-X solution with RocketIO MGT • ...
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R Virtex-4 Features This section briefly describes the features of the Virtex-4 family of FPGAs. Input/Output Blocks (SelectIO) IOBs are programmable and can be categorized as follows: • Programmable single-ended or differential (LVDS) operation • Input block with an optional ...
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Virtex-4 Family Overview XtremeDSP Slices The XtremeDSP slices contain a dedicated 18 x 18-bit 2’s complement signed multiplier, adder logic, and a 48-bit accumulator. Each multiplier or accumulator can be used independently. These blocks are designed to implement extremely efficient ...
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R One or Two PowerPC 405 Processor Cores • 32-bit Harvard Architecture • 5-Stage Execution Pipeline • Integrated 16KB Level 1 Instruction Cache and 16KB Level 1 Data Cache - Integrated Level 1 Cache Parity Generation and Checking • CoreConnect™ ...
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... MGTs I/O MGTs XC4VLX15 N/A 240 XC4VLX25 N/A 240 XC4VLX40 XC4VLX60 XC4VLX80 XC4VLX100 XC4VLX160 XC4VLX200 XC4VSX25 XC4VSX35 XC4VSX55 (1) XC4VFX12 N/A 240 (1) XC4VFX20 8 (1) XC4VFX40 12 (1) XC4VFX60 12 (1) XC4VFX100 (1) XC4VFX140 Notes: 1. These package/part combinations and the quantity of MGTs and I/Os are not final numbers. Virtex-4 Ordering Information ...
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R Revision History The following table shows the revision history for this document. Date Version 08/02/04 1.0 Initial Xilinx release. Printed Handbook version. 09/10/04 1.1 Typographical edits. Virtex-4 Documentation Complete and up-to-date documentation of the Virtex-4 family of FPGAs is ...
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Virtex-4 Family Overview 30 www.xilinx.com R DS112 (v1.1) September 10, 2004 Advance Product Specification ...