MK60FX512VLQ15 FREESCALE [Freescale Semiconductor, Inc], MK60FX512VLQ15 Datasheet - Page 22
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MK60FX512VLQ15
Manufacturer Part Number
MK60FX512VLQ15
Description
K60 Sub-Family Data Sheet
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MK60FX512VLQ15.pdf
(82 pages)
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General
1. The frequency limitations in VLPR mode here override any frequency specification listed in the timing specification for any
5.3.2 General switching specifications
These general purpose specifications apply to all signals configured for GPIO, UART,
CAN, CMT, IEEE 1588 timer, and I
22
Symbol
other module.
FB_CLK
FB_CLK
Symbol
f
f
f
f
t
t
LPTMR
LPTMR
FLASH
FLASH
io50
io50
f
f
SYS
BUS
GPIO pin interrupt pulse width (digital glitch filter
disabled) — Synchronous path
GPIO pin interrupt pulse width (digital glitch filter
disabled, analog filter enabled) — Asynchronous path
GPIO pin interrupt pulse width (digital glitch filter
disabled, analog filter disabled) — Asynchronous path
External reset pulse width (digital glitch filter disabled)
Mode select (EZP_CS) hold time after reset
deassertion
Port rise and fall time (high drive strength)
Port rise and fall time (low drive strength)
Description
FlexBus clock
Flash clock
LPTMR clock
System and core clock
Bus clock
FlexBus clock
Flash clock
LPTMR clock
Description
• Slew disabled
• Slew enabled
• Slew disabled
• Slew enabled
Table 9. Device clock specifications (continued)
K60 Sub-Family Data Sheet Data Sheet, Rev. 3, 2/2012.
Table 10. General switching specifications
Table continues on the next page...
2
C signals.
Preliminary
VLPR mode
1
Min.
100
100
1.5
16
—
—
—
—
Min.
2
—
—
—
—
—
—
—
—
Max.
TBD
TBD
TBD
TBD
Max.
—
—
—
—
—
50
25
25
4
4
4
1
4
Freescale Semiconductor, Inc.
Bus clock
Bus clock
cycles
cycles
Unit
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
Notes
Notes
1
2
2
2
3
4
3
4