SL811ST CYPRESS [Cypress Semiconductor], SL811ST Datasheet
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SL811S/T USB Dual Speed Slave Controller Data Sheet This document is subject to change without notice Cypress Semiconductor Corporation Document #: 38-08009 Rev. ** • 3901 North First Street • San Jose SL811S/T • CA 95134 • 408-943-2600 Revised October ...
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... SL811S/T PHYSICAL CONNECTION .......................................................................................... 14 6.1 Pin Layout .................................................................................................................................... 15 6.2 28-PIN PLCC Mechanical Dimensions ....................................................................................... 15 6.3 SL811S USB Controller, Pin Descriptions ................................................................................. 15 6.4 SL811ST Pin Layout .................................................................................................................... 17 6.5 SL811ST 48-Pin LPQFP Mechanical Dimensions ..................................................................... 18 6.6 SL811ST USB Controller, Pin Descriptions .............................................................................. 18 7.0 ELECTRICAL SPECIFICATIONS ................................................................................................. 20 7.1 Absolute Maximum Ratings ........................................................................................................ 20 7.1.1 Recommended Operating Condition ................................................................................................ 20 Document #: 38-08009 Rev. ** TABLE OF CONTENTS SL811S/T ...
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Crystal Requirement .......................................................................................................................... 20 7.2 External Clock Input Characteristics (48 MHz) (X1) ................................................................. 20 7.3 DC Characteristics ....................................................................................................................... 21 7.4 USB Transceiver Characteristics ............................................................................................... 21 7.5 Bus Interface Timing Requirements .......................................................................................... 22 7.5.1 I/O Write Cycle .................................................................................................................................... 22 7.5.2 ...
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... Cypress products, expressly or by implication. Cypress’s products are not authorized for use as critical components in life support devices or systems. SL811S and SL811ST are trademarks of the Cypress Semiconductor Corporation. All other product names and trademarks are registered trademarks of their respective owners. Document #: 38-08009 Rev. ** ...
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... Universal Serial Bus SL811S/T SL811S Cypress USB Controller, providing multiple functions on a single chip. The SL811S/T is available in both a 28-pin PLCC package, and a 48-pin LPQFP package (SL811ST) SL811S/T SL811S/T refers to both the SL811S and SL811ST. Note: This chip does not include a CPU. ...
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Block Diagram D+ INTERFACE USB XCVRS ENGINE D- CLOCK GENERATOR X1 4.3 Features 4.3.1 USB Specification Compliance • Conforms to USB Specification 1.1 4.3.2 CPU Interface • Standard Microprocessor Interface • Supports DMA Transfers • 256 x 8 SRAM ...
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The SL811S/T write or read operation terminates when either nWR or nCS becomes inactive. For devices interfacing to the SL811S/T that deactivate the Chip Select nCS before the write nWR, the data hold timing should be measured from the nCS ...
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X1 Document #: 38-08009 Rev MHz, series, 20-pF load Cbk 0.01 F Lin 2.2 - 3.3 H Figure 4-1. 48-MHz Crystal Circuit SL811S 100 Cout 22 pF Page ...
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X1 4.10 Power Resume and Suspend Mode SL811S/T has a built-in SOF (Start of Frame) Detect Interrupt signal that can be monitored by an external microprocessor. The SOF indicates continuous USB activity and is transmitted by the USB Host every ...
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Auto increment mode decreases the total time needed to transfer the block of data to or from the internal memory of the SL811S/T controller, eliminating the need to set the address for each byte to be transferred. The advantage of ...
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Endpoint Control Registers Each endpoint set has a control register defined as follows: Bit Position Bit Name 0 Arm Allows enabled transfers when set =’1’. Clears to '0' when transfer is complete. 1 Enable When set = '1' allows ...
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USB Control Registers The USB Control registers manage communication and data flow on the USB. Each USB device is composed of a collection of independently operating endpoints. Each endpoint has a unique identifier, which is the Endpoint Number. For ...
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JK-Force State USB Engine Reset Bit 5. USB Speed select. ‘0’ sets the USB Speed for Full Speed (12 MHz). ‘1’ sets the USB for Low Speed 1.5 MHz operation. Bit 6. ‘1’ sets the USB ...
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Current Data Set Register, Address [0EH] 5.4.5 Register indicates currently selected data set for each endpoint. Bit Position Bit Name 0 Endpoint 0 1 Endpoint 1 2 Endpoint 2 3 Endpoint 3 4-7 Reserved SOF Low Register, Address [15h] 5.4.6 ...
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Pin Layout nWR nCS CM VDD2 DAT A+ DAT A- Gnd 28-PIN PLCC Mechanical Dimensions 6.2 6.3 SL811S USB Controller, Pin Descriptions The SL811S package is a 28-pin PLCC. The device requires a 3.3VDC and a +3.3 VDC (VDD2) ...
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Pin No. Pin Type Pin Name nDACK 3 OUT nDRQ 4 IN NRD 5 IN NWR 6 IN NCS VDD2 3.3 VDC 9 BIDIR DATA + 10 BIDIR DATA - 11 ...
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... A simple 3.3V voltage source +5V (USB R1 45 Ohms 3.9v, 1N52288CT-ND GND 6.4 SL811ST Pin Layout The diagram below shows the pin assignments for SL811ST 48-pin LPQFP Package. Document #: 38-08009 Rev Zener +3.3 V (VDD2) Sample Generator 6/67 SL811S/T Page ...
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... SL811ST 48-Pin LPQFP Mechanical Dimensions 6.6 SL811ST USB Controller, Pin Descriptions The SL811ST is packaged in a 48-Pin LPQFP. The device requires 3.3VDC or +5VDC (VDD1) and a +3.3 VDC (VDD2) power supply. Average typical current consumption is less than 22 mA for 3.3 V. The SL811ST requires an external 48-MHz Crystal or Clock. Pin No. Pin Type ...
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... Document #: 38-08009 Rev. ** Pin Description SL811ST Device VDD Power. 12/48 MHz Clock or External Crystal X1 connection. External Crystal X2 connection. SL811ST Device active low reset input. Active High Interrupt Request output to external controller. SL811ST Device Ground. Data 0. Microprocessor Data/(Address) Bus Data 1 ...
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Electrical Specifications 7.1 Absolute Maximum Ratings This section lists the absolute maximum ratings of the SL811S. Stresses above those listed can cause permanent damage to the device. Exposure to maximum rated conditions for extended periods can affect device operation ...
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DC Characteristics Parameter V Input Voltage LOW IL V Input Voltage HIGH IH (5V Tolerant I/O) V Output Voltage LOW ( Output Voltage HIGH ( Output Current HIGH OH I Output Current LOW OL I ...
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Bus Interface Timing Requirements 7.5.1 I/O Write Cycle nWR twasu A0 twdsu D0-D7 twcsu nCS I/O Write Cycle to Register or Memory Buffer Note: nCS can be held low for multiple write cycles provided nWR is cycled. Parameter twr ...
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I/O Read Cycle nWR twasu A0 nRD twdsu D0-D7 nCS Parameter twr Write pulse width trd Read pulse width twcsu Chip select set-up to nWR twasu A0 address set-up time twahld A0 address hold time twdsu Data to write ...
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SL811S DMA Write Cycle 0 Parameter tdack nDACK low tdwrlo nDACK to nWR low delay tdakrq nDACK low to nDRQ high delay tdwrp nWR pulse width tdhld ...
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SL811S DMA Read Cycle 0-D 7 tdaccs Parameter Description tdack nDACK low tddrdlo nDACK to nRD low delay tdckdr nDACK low to nDRQ high delay tdrdp ...
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Reset Timing treset nRST nRD Parameter treset nRst Pulse width tioact nRst high to nRD or nWR active Note: Clock is 48 MHz nominal. 7.5.6 Clock Timing Specifications tclk CLK thigh Parameter Description tclk Clock period ...
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Revision History Document Title: SL811HS/T USB Dual Speed Slave Controller Data Sheet Document Number: 38-08009 ISSUE REV. ECN NO. DATE ** 110851 12/21/01 Document #: 38-08009 Rev. ** ORIG. OF CHANGE DESCRIPTION OF CHANGE BHA Converted to Cypress Format ...