CY8C20336H CYPRESS [Cypress Semiconductor], CY8C20336H Datasheet
CY8C20336H
Related parts for CY8C20336H
CY8C20336H Summary of contents
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... Interrupt controller ❐ Temperature range: –40 °C to +85 °C ■ Flexible on-chip memory ❐ Two program/data storage size options: • CY8C20336H flash / 1 KB SRAM • CY8C20446H flash / 2 KB SRAM ❐ 50,000 flash erase/write cycles ❐ Partial flash updates ❐ ...
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... Comparators SYSTEM BUS Internal I2C Voltage Slave References Note 1. Internal voltage regulator for internal circuitry Document Number: 001-56223 Rev. *C CY8C20336H, CY8C20446H Port 4 Port 3 Port 2 Port 1 Port 0 Global Analog Interconnect 8K/16K Flash Nonvolatile Memory CPU Core (M8C) Internal Low Speed Oscillator (ILO) ...
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... DC Low Power Comparator Specifications ............... 14 Comparator User Module Electrical Specifications ... 15 ADC Electrical Specifications ................................... 15 DC POR and LVD Specifications .............................. 16 DC Programming Specifications ............................... 16 AC Chip-Level Specifications .................................... 17 Document Number: 001-56223 Rev. *C CY8C20336H, CY8C20446H AC General Purpose I/O Specifications .................... 18 AC Comparator Specifications .................................. 19 AC External Clock Specifications .............................. 19 AC Programming Specifications................................ Specifications ...
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... System resources (including a full-speed USB port). A common, versatile bus allows connection between the I/O and the analog system. Each CY8C20336H/446H PSoC device includes a dedicated CapSense block that provides sensing and scanning control circuitry for capacitive sensing applications. Depending on the PSoC package GPIOs are also included. The GPIOs provide access to the MCU and analog mux ...
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... PSoC integrated circuit and presents specific pin, register, and electrical specifications. For in depth information, along with detailed programming details, see the Technical Reference Manual CY8C20336H/446H PSoC devices. For up-to-date ordering, packaging, and electrical specification information, see the latest PSoC device datasheets on the web at http://www.cypress.com/psoc. Document Number: 001-56223 Rev. *C ...
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... Document Number: 001-56223 Rev. *C CY8C20336H, CY8C20446H Organize and Connect Build signal chains at the chip level by interconnecting user modules to each other and the I/O pins. Perform the selection, configuration, and routing so that you have complete control over all on-chip resources ...
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... Pinouts The CY8C20336H/CY8C20446H PSoC device is available in a variety of packages which are listed and illustrated in the following tables. Every port pin (labeled with a “P”) is capable of digital I/O and connection to the common analog bus. However, V XRES are not capable of digital I/O. 24-Pin QFN Table 1. Pin Definitions - CY8C20336H ...
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... Description AI , P0[ P2[ XOut, P2[ XIn, P2[ P2[ P3[ P3[ SCL, SPI SS, P1[7] [ SCL, SPI MOSI. [ SDA., SPI CLK 2 C bus. Use alternate pins if you encounter any issues. CY8C20336H, CY8C20446H 1 24 P0[ P2[ P2[ QFN 4 21 P2[ P2[ (Top View ...
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... OCDO 43 OCDE 44 IOH I P0[7] 45 IOH I P0[5] 46 IOH I P0[3] 47 Power IOH I P0[1] CP Power bus. Use alternate pins if you encounter any issues. CY8C20336H, CY8C20446H 1 36 P2[ P2[ P2[ P2[ P4[ QFN 31 6 P4[ (Top View) P3[ P3[ P3[ ...
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... Ambient temperature A T Commercial temperature range C T Operational die temperature J Document Number: 001-56223 Rev. *C CY8C20336H, CY8C20446H http://www.cypress.com/psoc. 24 MHz Conditions Higher storage temperatures reduce data retention time. Recommended Storage Temperature is +25 °C ± 25 °C. Extended duration storage temperatures above 85 °C degrades reliability. ...
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... V to 1.9 V for more than 50 µsec, the slew rate when moving from the 1. 1.9 V range to greater than 2 V must be DD slower than 1 V/500 usec to avoid triggering POR. The only other restriction on slew rates for any other voltage range or transition is the SR Document Number: 001-56223 Rev. *C CY8C20336H, CY8C20446H Conditions Refer the table DC POR and LVD Specifications on page 16 ≤ ...
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... IH V Input hysteresis voltage H I Input leakage (absolute value Pin capacitance PIN Document Number: 001-56223 Rev. *C CY8C20336H, CY8C20446H ≤ 85 ° 2.4 V and –40 °C ≤ Conditions < 10 μA, maximum source I OH current in all I/ mA, maximum source OH current in all I/Os < ...
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... LDO regulator disabled for port 1 V Low output voltage OL V Input low voltage IL V Input high voltage IH Document Number: 001-56223 Rev. *C CY8C20336H, CY8C20446H Conditions < 10 μA, maximum source current in all I/ 0.2 mA, maximum source current in all I/Os < ...
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... Conditions Package and pin dependent Temp = 25 °C Conditions With idle bus While receiving traffic line In series with each USB pin Conditions is 1.8 V GND Conditions Maximum voltage limited CY8C20336H, CY8C20446H Min Typ Max Units – 80 – – 1 1000 0.50 1.70 7 Min ...
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... Integral nonlinearity E Offset error OFFSET E Gain error GAIN Power I Operating current ADC PSRR Power supply rejection ratio Document Number: 001-56223 Rev. *C CY8C20336H, CY8C20446H ≤ 5 Conditions Min 50-mV overdrive – Valid from 0 – 0.2 V – DD Average DC current – overdrive Power supply rejection ratio – ...
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... Driving internal pull-down resistor IHP See appropriate DC General Purpose I/O Specifications on page 12 table on page 16. For V > use V in Table OH4 page 10. Erase/write cycles per block Following maximum flash write cycles; ambient temperature of 55 °C CY8C20336H, CY8C20446H Min Typ Max Units 1.61 1.66 1.71 – 2.36 2.41 – 2.60 2.66 – 2.82 2 ...
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... XRST T External reset pulse width after power-up XRST2 Note 18. The minimum required XRES pulse length is longer when programming the device (see Document Number: 001-56223 Rev. *C CY8C20336H, CY8C20446H Conditions V slew rate during power-up DD After supply voltage is valid [18] Applies after part has booted Table 23 on page 20) ...
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... V, 10% – 90% DD LDO enabled or disabled V = 3.0 to 3.6 V, 10% – 90 1.71 to 3.0 V, 10% – 90% DD Figure 6. GPIO Timing Diagram 90% 10% TRise23 TFall TFallL TRise01 TRise23L TRise01L CY8C20336H, CY8C20446H Min Typ Max Units 0 – 6 MHz for 1.71 V <V < 2. MHz for 0 – 2.40 V < V < 5. – ...
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... There is a corner case at lower supply voltages, such as those under 3.3 V. This condition does not affect USB communications. FRFM Signal integrity tests show an excellent eye diagram at 3.15 V. Document Number: 001-56223 Rev. *C CY8C20336H, CY8C20446H Conditions Average bit rate 12 – 0.25% ...
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... XRES event, XRESINI based on eight ILO clocks Document Number: 001-56223 Rev. *C Figure 7. AC Waveform T FSCLK T HSCLK Conditions DD ≤ 3.6 DD ≤ 3.0 DD when coming out of sleep ramp CY8C20336H, CY8C20446H T DSCLK Min Typ Max Units 1 – – – – 40 – ...
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... Standard-Mode I rmax SU;DAT Document Number: 001-56223 Rev SDA and SCL Pins Description 2 C-bus system, but the requirement t SU;DAT 2 C-bus specification) before the SCL line is released. CY8C20336H, CY8C20446H Standard Fast Mode Mode Units Min Max Min Max 0 100 ...
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... DD V < 2.4 V – DD – ≥ 2 < 2.4 V 100 DD 40 – 40 Figure 9. SPI Master Mode 0 and 2 T HOLD MSB T OUT_H CY8C20336H, CY8C20446H Typ Max Units – 6 MHz – – % – – ns – – – – ns – – – ...
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... Document Number: 001-56223 Rev. *C Figure 10. SPI Master Mode 1 and SETUP HOLD MSB T OUT_SU OUT_H MSB Conditions ≥ 2 < 2 2/SCLK 2/SCLK CY8C20336H, CY8C20446H 1/F SCLK T T HIGH LOW LSB LSB Min Typ Max Units – – 12 MHz – – – ...
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... Figure 11. SPI Slave Mode 0 and OUT_H SS_MISO T T SETUP HOLD MSB Figure 12. SPI Slave Mode 1 and 3 T OUT_H T SCLK_MISO MSB T T SETUP HOLD MSB CY8C20336H, CY8C20446H T T SS_HIGH CLK_SS 1/F SCLK T T HIGH LOW LSB T CLK_SS 1/F SCLK T T HIGH LOW LSB ...
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... Packaging Information This section illustrates the packaging specifications for the CY8C20336H/CY8C20446H PSoC device, along with the thermal imped- ances for each package. Important Note Emulation tools may require a larger area on the target PCB than the chip’s footprint. For a detailed description of the emulation tools’ ...
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... For information on the preferred dimensions for mounting QFN packages, see the following Application Note at http://www.amkor.com/products/notes_papers/MLFAppNote.pdf. ■ Pinned vias for thermal conduction are not required for the low power PSoC device. Document Number: 001-56223 Rev. *C Figure 14. 32-Pin (5 × 5 × 0.55 mm) QFN Figure 15. 48-Pin (7 × 7 × 1.0 mm) QFN CY8C20336H, CY8C20446H 001-42168 *D 001-13191 *E Page [+] Feedback ...
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... Higher temperatures may be required based on the solder melting point. Typical temperatures for solder are 220 ± 5 °C with Sn-Pb or 245 ± 5 °C with Sn-Ag-Cu paste. Refer to the solder manufacturer specifications. Document Number: 001-56223 Rev. *C Typical θ [21] JA 20.90 °C/W 19.51 °C/W 17.68 °C/W Package Capacitance 3.2 pF 3.3 pF Time at Maximum Peak Temperature 260 °C 260 °C 260 °C CY8C20336H, CY8C20446H Page [+] Feedback ...
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... Standard Cypress PSoC IDE tools are available for debugging the CY8C20336H/CY8C20446H family of parts. However, the additional trace length and a minimal ground plane in the Flex- Pod can create noise problems that make it difficult to debug the design ...
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... CY3210 MiniProg1 Programmer ■ USB 2.0 retractable cable ■ CY3280-20x66 Kit CD Document Number: 001-56223 Rev. *C CY8C20336H, CY8C20446H Device Programmers All device programmers are purchased from the Cypress Online Store. CY3216 Modular Programmer The CY3216 Modular Programmer kit programmer and the MiniProg1 programming unit. The modular programmer includes three programming module cards and supports multiple Cypress products ...
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... Application Note “Debugging - Build a PSoC Emulator into Your Board - AN2323” at http://www.cypress.com/?rID2748. Ordering Information The following table lists the CY8C20336H/CY8C20446H PSoC devices' key package features and ordering codes. Table 31. PSoC Device Key Features and Ordering Information Package 24-pin (4x4x0 ...
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... USB D- USB Data- WLCSP wafer level chip scale package XTAL crystal Document Number: 001-56223 Rev. *C CY8C20336H, CY8C20446H Units of Measure Table 32 lists all the abbreviations used to measure the PSoC devices. Numeric Naming Hexadecimal numbers are represented with all letters in uppercase with an appended lowercase ‘h’ (for example, ‘14h’ or ‘ ...
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... Serial peripheral interface is a synchronous serial data link standard. Reference Documents ■ Technical reference manual for CY8C20xx6 ■ In-system Serial Programming (ISSP) protocol for 20xx6 – ■ Host Sourced Serial Programming for 20xx6 devices – Document Number: 001-56223 Rev. *C CY8C20336H, CY8C20446H devices AN2026C AN59389 Page [+] Feedback ...
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... Document History Page Document Title: CY8C20336H/CY8C20446H Haptics Enabled CapSense Document Number: 001-56223 Origin of Revision ECN Change ** 2787411 VZD/AESA *A 3016550 KEJO/KPOL *B 3089844 JPM *C 3180479 YVA Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office ...