ATAM894X-TNQY ATMEL [ATMEL Corporation], ATAM894X-TNQY Datasheet - Page 5
ATAM894X-TNQY
Manufacturer Part Number
ATAM894X-TNQY
Description
8k-flash Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATAM894X-TNQY.pdf
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5.2
5.2.1
5.2.1.1
5.2.2
4679D–4BMCU–05/05
Components of MARC4 Core
Program Memory
RAM
ROM Banking
The core contains ROM, RAM, ALU, program counter, RAM address registers, instruction
decoder and interrupt controller. The following sections describe each functional block in more
detail.
The program memory (EEPROM) is electrically programmable and erasable with the customer
application program. The program memory is addressed by a 12-bit wide program counter and
an additional ROM bank register, thus predefining a maximum linear adressable program bank
size of 4 Kbytes. The upper 2 Kbytes may be exchanged by ROM banking, thus allowing to
address a maximum of 10 Kbytes user program. 8 Kbytes of program memory are available
within the ATAM894. The lowest user (EEP)ROM address segment is taken up by a 512-byte
zero page which contains predefined start addresses for interrupt service routines and special
subroutines accessible with single byte instructions (SCALL).
The corresponding memory map is shown in
held in ROM and are accessed via the MARC4’s built-in table instruction.
Figure 5-2.
For customers programming with qFORTH the bank switching is fully supported by the compiler.
The MARC4 switches from one ROM bank to another by writing the new bank number to the
ROM Bank Register (RBR). Conventional program space (power-up bank) resides in ROM bank
0. Each ROM bank consists of a 2 Kbyte address space whereby the lowest 2 Kbyte, the base
bank, is common to all banks, so that addresses between 000h and 7FFh always access the
same ROM data (see
insert program code to save and restore the condition of the RBR on bank switching.
The ATAM894 contains 256
expression stack, the return stack and data memory for variables and arrays. The RAM is
addressed by any of the four 8-bit wide RAM address registers SP, RP, X and Y.
FFFh
7FFh
800h
000h
Base bank
Bank 1
Zero page
ROM Map
Bank 2
Bank 3
Figure
Port D: 00xxb
Bank 4
Port D: 01xxb
5-2). When ROM banking is used, the compiler will, if necessary,
4-bit wide static random access memory (RAM). It is used for the
Port D: 10xxb
Port D: 11xxb
Figure
1FFh
000h
5-2. Look-up tables of constants can also be
1F8 h
1 F0 h
1 E 8 h
1 E 0 h
0 2 0 h
01 8 h
01 0 h
0 0 8 h
0 0 0 h
page
1 E 0 h
1 C 0 h
1 0 0 h
0 C 0 h
0 8 0 h
0 0 0 h
1 8 0h
1 4 0h
0 4 0h
0 0 8h
ATAM894
INT7
INT6
INT5
INT4
INT3
INT2
INT1
INT0
$RESET
$AUTOSLEEP
5
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