Z86E3016ESE ZILOG [Zilog, Inc.], Z86E3016ESE Datasheet - Page 18
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Z86E3016ESE
Manufacturer Part Number
Z86E3016ESE
Description
Z8 4K OTP Microcontroller
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
1.Z86E3016ESE.pdf
(66 pages)
- Current page: 18 of 66
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Z86E30/E31/E40
Z8 4K OTP Microcontroller
Notes:
Standard Test Load
All timing references use 0.7 V
For Standard Mode (not Low-EMI Mode for outputs) with SMR D1 = 0, D0 = 0
18
1. When using extended memory timing add 2 TpC
2. Timing numbers given are for minimum TpC
3. The V
No
10
11
12
13
14
15
16
17
18
20
1
2
3
4
5
6
7
8
9
the V
TdA(AS)
TdAS(A)
TdAS(DR)
TwAS
TdAS(DS)
TwDSR
TwDSW
TdDSR(DR)
ThDR(DS)
TdDS(A)
TdDS(AS)
TdR/W(AS)
TdDS(R/W)
TdDW(DSW)
TdDS(DW)
TdA(DR)
TdAS(DS)
TdDM(AS)
ThDS(AS)
CC
CC
voltage specification of 3.5V guarantees 3.5V only
Symbol
voltage specification of 5.5V guarantees 5.0V +/- 0.5V and
Address Valid to /AS Rise
Delay
/AS Rise to Address Float
Delay
/AS Rise to Read Data
Req’d Valid
/AS Low Width
Address Float to /DS Fall
/DS (Read) Low Width
/DS (Write) Low Width
/DS Fall to Read Data Req’d
Valid
Read Data to /DS Rise Hold
Time
/DS Rise to Address Active
Delay
/DS Rise to /AS Fall Delay
R//W Valid to /AS Rise
Delay
/DS Rise to R//W Not Valid
Write Data Valid to /DS Fall
(Write) Delay
/DS Rise to Write Data Not
Valid Delay
Address Valid to Read Data
Req’d Valid
/AS Rise to /DS Fall Delay
/DM Valid to /AS Fall Delay
/DS Valid to Address Valid
Hold Time
CC
for a logic 1 and 0.2 V
Parameter
P R E L I M I N A R Y
CC
for a logic 0
Note [3]
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
V
CC
T
Min
135
135
A
25
25
35
35
40
40
80
80
50
50
35
35
25
25
35
35
55
55
35
35
45
45
30
30
35
35
0
0
0
0
= 0 C to 70 C
16 MHz
Max
180
180
230
230
75
75
25
25
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DS97Z8X0500
Notes
1,2
1,2
1,2
1,2
1,2
2
2
2
2
2
2
2
2
2
2
2
2
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