MPC8308CVMADDA FREESCALE [Freescale Semiconductor, Inc], MPC8308CVMADDA Datasheet - Page 39

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MPC8308CVMADDA

Manufacturer Part Number
MPC8308CVMADDA
Description
MPC8308 PowerQUICC II Pro Processor Hardware Specification
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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Part Number:
MPC8308CVMADDA
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11.4.3
Table 35
specified at the component pins.
Freescale Semiconductor
Unit interval
Differential peak-to-peak
output voltage
Minimum receiver eye
width
Parameter
defines the specifications for the differential input at all receivers (RXs). The parameters are
Figure 27. Minimum Transmitter Timing and Voltage Output Compliance Specifications
Differential Receiver (RX) Input Specifications
MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 0
Table 35. Differential Receiver (RX) Input Specifications
V
Symbol
RX-DIFFp-p
T
(D+ D– Crossing Point)
RX-EYE
UI
V
TX-DIFF
= 0 mV
566 mV (3 dB) >= V
Each U
300 ppm. U
account for Spread
Spectrum Clock dictated
variations.
V
V
The maximum
interconnect media and
Transmitter jitter that can
be tolerated by the
Receiver can be derived
as T
U
PEDPPRX
RX-D-
PEEWRX
RX-MAX-JITTER
0.7 UI = UI – 0.3 UI(J
|
Comments
PERX
V
V
= 0.6 UI.
[De-emphasized Bit]
TX-DIFFp-p-MIN
TX-DIFFp-p-MIN
= 2*|V
PERX
[Transition Bit]
[Transition Bit]
is 400 ps ±
TX-DIFFp-p-MIN
RX-D+
does not
= 1 -
= 800 mV
= 800 mV
TX-TOTAL-MAX
-
>= 505 mV (4 dB)
399.88
0.175
Min
0.4
(D+ D– Crossing Point)
)
V
TX-DIFF
Typical
400
= 0 mV
400.12
1.200
Max
Units
ps
UI
V
PCI Express
Notes
2, 3
1
2
39

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