MC68HC05K1 FREESCALE [Freescale Semiconductor, Inc], MC68HC05K1 Datasheet - Page 70

• Manufacturer Part Number: MC68HC05K1
• Description: HCMOS Microcontroller Unit
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Technical Data
7.4 Port B
7.4.1 Port B Data Register
Technical Data
Pulldown
Option
X = Don’t care
U = Undefined
Mask
Yes
Yes
Yes
Yes
No
No
PDIAx
Control Bits
X
X
0
0
1
1
DDRAx
0
1
0
1
0
1
When a port A pin is programmed as an output, reading the port bit
actually reads the value of the data latch and not the voltage on the pin
itself. When a port A pin is programmed as an input, reading the port bit
reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its DDR bit.
operations of the port A pins.
Port B is a 2-bit, general-purpose, bidirectional I/O port with these
features:
The port B data register (PORTB), shown in
for each of the port B pins. When a port B pin is programmed to be an
output, the state of its data register bit determines the state of the output
pin. When a port B pin is programmed to be an input, reading the port B
•
•
Freescale Semiconductor, Inc.
I/O Pin Mode
pulldown on
For More Information On This Product,
Input, hi-z
Input, hi-z
Programmable pulldown devices (mask option)
Oscillator output for 3-pin resistor-capacitor (RC) oscillator mask
option
Output
Output
Output
Table 7-1. Port A Pin Functions
Input,
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Parallel Input/Output (I/O)
Read
U
U
U
U
U
U
Accesses
to PDRA
PDIA7–PDIA0
PDIA7–PDIA0
PDIA7–PDIA0
PDIA7–PDIA0
PDIA7–PDIA0
PDIA7–PDIA0
Write
MC68HC05K0 • MC68HC05K1 — Rev. 2.0
Table 7-1
DDRA7–DDRA0
DDRA7–DDRA0
DDRA7–DDRA0
DDRA7–DDRA0
DDRA7–DDRA0
DDRA7–DDRA0
Read/Write
Accesses
to DDRA
Figure
summarizes the
7-5, contains a bit
PA0–PA7
PA0–PA7
PA0–PA7
Read
Pin
Pin
Pin
to PORTA
Accesses
PA0–PA7
PA0–PA7
PA0–PA7
PA0–PA7
PA0–PA7
PA0–PA7
Write