CY8C38_1105 CYPRESS [Cypress Semiconductor], CY8C38_1105 Datasheet - Page 3
CY8C38_1105
Manufacturer Part Number
CY8C38_1105
Description
Programmable System-on-Chip (PSoC) Multiply and divide instructions
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CY8C38_1105.pdf
(130 pages)
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1. Architectural Overview
Introducing the CY8C38 family of ultra low-power, flash Programmable System-on-Chip (PSoC
PSoC 3 and 32-bit PSoC 5 platform. The CY8C38 family provides configurable blocks of analog, digital, and interconnect circuitry
around a CPU subsystem. The combination of a CPU with a flexible analog subsystem, digital subsystem, routing, and I/O enables
a high level of integration in a wide variety of consumer, industrial, and medical applications.
Figure 1-1
family. They are:
Document Number: 001-11729 Rev. *S
8051 CPU subsystem
Nonvolatile subsystem
Programming, debug, and test subsystem
Inputs and outputs
Clocking
Power
Digital subsystem
Analog subsystem
0 .5
( Optional )
4
V
32. 7 68 KHz
( Optional )
to
to 5.5 V
(Optional )
25 MHz
illustrates the major components of the CY8C38
System Wide
Resources
Clocking System
Power Management
Xtal
Osc
IMO
1.8V LDO
POR and
Power
Timer
System
Sleep
Wake
SMP
WDT
LVD
RTC
ILO
and
Digital Interconnect
Figure 1-1. Simplified Block Diagram
8-bit
I
Timer
2
UART
EEPROM
C Slave
EMIF
LCD Direct
Temperature
UDB
UDB
UDB
UDB
(TIA, PGA, Mixer etc)
CapSense
Universal Digital Block Array ( 24 x UDB)
Sensor
Drive
Quadrature Decoder
4 x SC/CT Blocks
Memory System
8-bit SPI
UDB
UDB
UDB
UDB
FLASH
SRAM
4 x DAC
12-bit SPI
Logic
12- bit PWM
Digital
Block
Filter
UDB
UDB
UDB
UDB
16-bit
PWM
System Bus
16-bit PRS
8-bit
Timer
PSoC’s digital subsystem provides half of its unique
configurability. It connects a digital signal from any peripheral to
any pin through the digital system interconnect (DSI). It also
provides functional flexibility through an array of small, fast,
low-power UDBs. PSoC Creator provides a library of prebuilt and
tested standard digital peripherals (UART, SPI, LIN, PRS, CRC,
timer, counter, PWM, AND, OR, and so on) that are mapped to
the UDB array. You can also easily create a digital circuit using
boolean primitives by means of graphical design entry. Each
UDB contains programmable array logic (PAL)/programmable
logic device (PLD) functionality, together with a small state
machine engine to support a wide variety of peripherals.
In addition to the flexibility of the UDB array, PSoC also provides
configurable digital blocks targeted at specific functions. For the
CY8C38 family these blocks can include four 16-bit timers,
counters, and PWM blocks; I
FS USB; and Full CAN 2.0b.
Digital System
UDB
UDB
UDB
UDB
Analog Interconnect
Logic
Cortex M3 CPU
Analog System
8051 or
UDB
UDB
UDB
UDB
ADC
Del Sig
CPU System
ADC
1 x
UDB
UDB
UDB
UDB
Controller
Interrupt
PHUB
DMA
PSoC
Counter
Timer
PWM
4 x
CAN
2.0
®
) devices, part of a scalable 8-bit
Opamp
2
CMP
C slave, master, and multimaster;
4 x
4 x
®
Program &
Boundary
Program
Debug &
Debug
+
+
FS USB
-
-
3: CY8C38 Family
Master /
Trace
Scan
Slave
I
2.0
2
C
Data Sheet
USB
PHY
Opamp
3 per
Page 3 of 130
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