PIC18F2331 MICROCHIP [Microchip Technology], PIC18F2331 Datasheet - Page 186

• Manufacturer Part Number: PIC18F2331
• Description: 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F2331/2431/4331/4431
17.1
The operation of the PWM module is controlled by a
total of 22 registers. Eight of these are used to
configure the features of the module:
• PWM Timer Control register 0 (PTCON0)
• PWM Timer Control register 1 (PTCON1)
• PWM Control register 0 (PWMCON0)
• PWM Control register 1 (PWMCON1)
• Dead Time Control register (DTCON)
• Output Override Control register (OVDCOND)
• Output State register (OVDCONS)
• Fault Configuration register (FLTCONFIG)
There are also 14 registers that are configured as
seven register pairs of 16 bits. These are used for the
configuration values of specific features. They are:
• PWM Time Base Registers (PTMRH and PTMRL)
• PWM Period Registers (PTPERH and PTPERL)
• PWM Special Event Compare Registers
• PWM Duty Cycle #0 Registers
• PWM Duty Cycle #1 Registers
• PWM Duty Cycle #2 Registers
• PWM Duty Cycle #3 registers
All of these register pairs are double-buffered.
DS39616B-page 184
(SEVTCMPH and SEVTCMPL)
(PDC0H and PDC0L)
(PDC1H and PDC1L)
(PDC2H and PDC2L)
(PDC3H and PDC3L)
Control Registers
Preliminary
17.2
The PWM module supports several modes of operation
that are beneficial for specific power and motor control
applications. Each mode of operation is described in
subsequent sections.
The PWM module is composed of several functional
blocks. The operation of each is explained separately
in relation to the several modes of operation:
• PWM Time Base
• PWM Time Base Interrupts
• PWM Period
• PWM Duty Cycle
• Dead Time Generators
• PWM Output Overrides
• PWM Fault Inputs
• PWM Special Event Trigger
17.3
The PWM time base is provided by a 12-bit timer with
prescaler and postscaler functions. A simplified block
diagram of the PWM time base is shown in Figure 17-4.
The PWM time base is configured through the
PTCON0 and PTCON1 registers. The time base is
enabled or disabled by respectively setting or clearing
the PTEN bit in the PTCON1 register.
Note:
Module Functionality
PWM Time Base
The PTMR register pair (PTMRL:PTMRH)
is not cleared when the PTEN bit is
cleared in software.
 2003 Microchip Technology Inc.