PIC18F2420 MICROCHIP [Microchip Technology], PIC18F2420 Datasheet - Page 27

• Manufacturer Part Number: PIC18F2420
• Description: 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

2.4
For timing insensitive applications, the “RC” and
“RCIO” device options offer additional cost savings.
The actual oscillator frequency is a function of several
factors:
• supply voltage
• values of the external resistor (R
• operating temperature
Given the same device, operating voltage and tempera-
ture and component values, there will also be unit-to-unit
frequency variations. These are due to factors such as:
• normal manufacturing variation
• difference in lead frame capacitance between
• variations within the tolerance of limits of R
In the RC Oscillator mode, the oscillator frequency
divided by 4 is available on the OSC2 pin. This signal
may be used for test purposes or to synchronize other
logic. Figure 2-5 shows how the R/C combination is
connected.
FIGURE 2-5:
The RCIO Oscillator mode (Figure 2-6) functions like
the RC mode, except that the OSC2 pin becomes an
additional general purpose I/O pin. The I/O pin
becomes bit 6 of PORTA (RA6).
FIGURE 2-6:
 2004 Microchip Technology Inc.
C
V
C
Recommended values: 3 k
V
capacitor (C
package types (especially for low C
and C
R
Recommended values: 3 k
R
EXT
SS
EXT
SS
EXT
EXT
V
V
DD
DD
EXT
RC Oscillator
RA6
EXT
F
OSC
)
/4
RC OSCILLATOR MODE
OSC1
RCIO OSCILLATOR MODE
OSC1
OSC2/CLKO
I/O (OSC2)
C
C
EXT
EXT
> 20 pF
> 20 pF
R
R
EXT
EXT
EXT
100 k
100 k
EXT
PIC18FXXXX
PIC18FXXXX
) and
values)
Internal
Internal
Clock
Clock
PIC18F2420/2520/4420/4520
EXT
Preliminary
2.5
A Phase Locked Loop (PLL) circuit is provided as an
option for users who wish to use a lower frequency
oscillator circuit or to clock the device up to its highest
rated frequency from a crystal oscillator. This may be
useful for customers who are concerned with EMI due
to high-frequency crystals or users who require higher
clock speeds from an internal oscillator.
2.5.1
The HSPLL mode makes use of the HS mode oscillator
for frequencies up to 10 MHz. A PLL then multiplies the
oscillator output frequency by 4 to produce an internal
clock frequency up to 40 MHz. The PLLEN bit is not
available in this oscillator mode.
The PLL is only available to the crystal oscillator when
the FOSC3:FOSC0 configuration bits are programmed
for HSPLL mode (= 0110).
FIGURE 2-7:
2.5.2
The PLL is also available to the internal oscillator block
in selected oscillator modes. In this configuration, the
PLL is enabled in software and generates a clock out-
put of up to 32 MHz. The operation of INTOSC with the
PLL is described in Section 2.6.4 “PLL in INTOSC
Modes”.
OSC2
OSC1
PLL Frequency Multiplier
(from Configuration Register 1H)
HS Oscillator Enable
HS Mode
HSPLL OSCILLATOR MODE
PLL AND INTOSC
Crystal
Osc
PLL Enable
F
F
PLL BLOCK DIAGRAM
(HS MODE)
IN
OUT
4
Comparator
Loop
Filter
Phase
VCO
DS39631A-page 25
SYSCLK