PIC18F2525 MICROCHIP [Microchip Technology], PIC18F2525 Datasheet - Page 130
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PIC18F2525
Manufacturer Part Number
PIC18F2525
Description
28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F2525.pdf
(390 pages)
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PIC18F2525/2620/4525/4620
12.1
Timer1 can operate in one of these modes:
• Timer
• Synchronous Counter
• Asynchronous Counter
The operating mode is determined by the clock select
bit, TMR1CS (T1CON<1>). When TMR3CS is cleared
(= 0), Timer1 increments on every internal instruction
FIGURE 12-1:
FIGURE 12-2:
DS39626B-page 128
Note 1: When enable bit, T1OSCEN, is cleared, the inverter and feedback resistor are turned off to eliminate power drain.
Note 1: When enable bit, T1OSCEN, is cleared, the inverter and feedback resistor are turned off to eliminate power drain.
T1OSO/T13CKI
T1OSO/T13CKI
Timer1 Operation
T1OSI
T1OSI
Timer1 Oscillator
Timer1 Oscillator
T1OSCEN
T1CKPS1:T1CKPS0
T1SYNC
TMR1ON
T1OSCEN
TIMER1 BLOCK DIAGRAM
TIMER1 BLOCK DIAGRAM (16-BIT READ/WRITE MODE)
T1CKPS1:T1CKPS0
T1SYNC
TMR1ON
(1)
(1)
TMR1CS
TMR1CS
(CCP Special Event Trigger)
Clear TMR1
(CCP Special Event Trigger)
Clear TMR1
Clock
Internal
Clock
F
F
Internal
OSC
OSC
/4
/4
Preliminary
On/Off
1
0
1
0
Timer1 Clock Input
Timer1 Clock Input
Prescaler
Prescaler
cycle (Fosc/4). When the bit is set, Timer1 increments
on every rising edge of the Timer1 external clock input
or the Timer1 oscillator, if enabled.
When Timer1 is enabled, the RC1/T1OSI and RC0/
T1OSO/T13CKI pins become inputs. This means the
values of TRISC<1:0> are ignored and the pins are
read as ‘0’.
1, 2, 4, 8
1, 2, 4, 8
2
2
TMR1L
TMR1L
8
Sleep Input
Synchronize
Sleep Input
8
Synchronize
Detect
Detect
High Byte
High Byte
TMR1H
TMR1
TMR1
8
2004 Microchip Technology Inc.
8
8
Internal Data Bus
1
0
1
0
Read TMR1L
Write TMR1L
Set
TMR1IF
on Overflow
Set
TMR1IF
on Overflow
Timer1
Timer1
On/Off
On/Off
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