SAB-C509-LM SIEMENS [Siemens Semiconductor Group], SAB-C509-LM Datasheet - Page 54

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SAB-C509-LM

Manufacturer Part Number
SAB-C509-LM
Description
8-Bit CMOS Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
The A/D converter provides the following features:
The A/D converter uses basically three clock signals for operation : the input clock f
conversion clock f
from the C509-L system clock f
to f
limited to a maximum frequency of 2 MHz. The table in figure 28 defines the divider ratio for the
conversion and sample clock of each combination of the prescaler bits.
Figure 28
A/D Converter Clock Selection
Semiconductor Group
– 15 multiplexed input channels, which can also be used as digital inputs (port 7, port 8)
– 10-bit resolution
– Single or continuous conversion mode
– Internal or external start-of-conversion trigger capability
– Programmable conversion and sample clock
– Interrupt request generation after each conversion
– Using successive approximation conversion technique via a capacitor array
– Built-in hidden calibration of offset and linearity errors
OSC
Conversion Clock f
ADCL1 ADCL0 f
0
0
1
1
while the conversion clock and the sample clock must be adapted. The conversion clock is
0
1
0
1
ADC
ADC
ADC
f
f
f
f
IN
IN
IN
IN
(=1/t
/ 16
/ 32
/ 4
/ 8
ADC
Sample Clock f
ADST1 ADST0
OSC
) and the sample clock f
0
f
f
f
f
IN
IN
IN
which is applied at the XTAL pins. The input clock f
IN
/ 16
/ 32
/ 64
/ 8
0
SC
ADST1 ADST0
53
0
f
f
f
f
IN
IN
IN
IN
/ 128
/ 16
/ 32
/ 64
SC
1
(=1/t
ADST1 ADST0
SC
1
f
f
). All clock signals are derived
f
f
IN
IN
IN
IN
/ 128
/ 256
/ 32
/ 64
0
ADST1 ADST0
1
f
f
f
IN
f
IN
IN
IN
IN
/ 128
/ 256
/ 512
(=1/t
/ 64
IN
C509-L
1
is equal
IN
09.96
), the

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