AT89C51IC2-RLTIM ATMEL [ATMEL Corporation], AT89C51IC2-RLTIM Datasheet - Page 29
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AT89C51IC2-RLTIM
Manufacturer Part Number
AT89C51IC2-RLTIM
Description
8-bit Flash Microcontroller with 2-wire Interface
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT89C51IC2-RLTIM.pdf
(147 pages)
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4301C–8051–06/06
Table 23. AUXR Register
AUXR - Auxiliary Register (8Eh)
Reset Value = XX0X 00’HSB.XRAM’0b
Not bit addressable
Number
Bit
7
7
6
5
4
3
2
1
0
-
Mnemonic Description
EXTRAM
XRS1
XRS0
Bit
M0
AO
6
-
-
-
-
Reserved
Reserved
Pulse length
Cleared to stretch MOVX control: the RD/ and the WR/ pulse length is 6 clock
periods (default).
Set to stretch MOVX control: the RD/ and the WR/ pulse length is 30 clock
periods.
Reserved
The value read from this bit is indeterminate. Do not set this bit
XRAM Size
XRS1
0
0
1
1
EXTRAM bit
Cleared to access internal XRAM using movx @ Ri/ @ DPTR.
Set to access external memory.
Programmed by hardware after Power-up regarding Hardware Security Byte
(HSB), default setting, XRAM selected.
ALE Output bit
Cleared, ALE is emitted at a constant rate of 1/6 the oscillator frequency (or 1/3 if
X2 mode is used) (default) Set, ALE is active only during a MOVX or MOVC
instruction is used.
The value read from this bit is indeterminate. Do not set this bit
The value read from this bit is indeterminate. Do not set this bit
M0
5
0
1
0
1
XRS0
4
-
XRAM size
256 bytes (default)
512 bytes
768 bytes
1024 bytes
XRS1
3
XRS0
2
AT89C51IC2
EXTRAM
1
AO
0
29
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