ISL6412_07 INTERSIL [Intersil Corporation], ISL6412_07 Datasheet - Page 7

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ISL6412_07

Manufacturer Part Number
ISL6412_07
Description
Triple Output, Low-Noise LDO Regulator with Integrated Reset Circuit
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet
Typical Performance Curves
Pin Descriptions
OUT1 - This pin is the output for LDO1. Bypass with a
minimum of 2.2µF, low ESR capacitor to GND for stable
operation.
V
Bypass with a minimum 2.2μF capacitor to GND. Both V
pins must be tied together on the PC board, close to the IC.
GND - Ground for LDO1 and LDO2.
CC1 - Compensation Capacitor for LDO1. Connect a
0.033µF capacitor from CC1 to GND.
SHDN - Shutdown input for all LDOs. Connect to V
normal operation. Drive this pin LOW to turn off all LDOs.
IN
- Supply input pins. Connect to input power source.
FIGURE 9. THERMAL SHUTDOWN OPERATION
VOUT1/2/3
FAULT
1V/DIV
1V/DIV
FIGURE 11. VOUT1 REGULATION DOWN TO VIN = 2.7V; FAULT MONITORS VOUT1 ONLY
7
500ms/DIV
0.5V/DIV
VOUT1
The test conditions for the Typical Operating Performance are: V
Unless Otherwise Noted (Continued)
0.5V/DIV
VIN
IN
0.5V/DIV
FAULT
for
IN
ISL6412
VIN = 2.7V
OUT2 - This pin is the output for LDO2. Bypass with a
minimum of 2.2µF, low ESR capacitor to GND for stable
operation.
CT - Timing pin for the RESET circuit pulse width.
CC2 - Compensation capacitor for LDO2. Connect a
0.033µF capacitor from CC2 to GND.
OUT3 - This pin is output for LDO3. Bypass with a minimum
of 2.2µF, low ESR capacitor to GND3 for stable operation.
GND3 - Ground pin for LDO3.
CC3 - Compensation capacitor for LDO3. Connect a
0.033µF capacitor from CC3 to GND3.
FAULT1 - This is the power good indicator for LDO1. When
the 1.8V output is out of regulation this pin goes LOW. This
FIGURE 10. LDO1 POWER SUPPLY REJECTION
-10
-20
-30
-40
-50
-60
10
(IOUT1 = 100mA, COUT = 10µF MLCC)
100
FREQUENCY (A)
1k
IN
= 3.3V, T
10k
A
= +25°C,
100k
March 20, 2007
FN9067.1
1M

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