ISL8700 INTERSIL [Intersil Corporation], ISL8700 Datasheet - Page 4

• Manufacturer Part Number: ISL8700
• Description: Adjustable Quad Sequencer
• Manufacturer: INTERSIL [Intersil Corporation]

Pin Descriptions
Electrical Specifications
ISL8700 ISL8701 ISL8702
BIAS
IC Supply Current
V
IN
NA
NA
NA
NA
NA
NA
NA
10
11
12
13
14
1
2
3
4
5
6
7
Power On Reset
PIN NUMBER
NA
NA
NA
NA
NA
NA
NA
10
11
12
13
14
1
2
3
4
5
6
7
PARAMETER
NA
NA
NA
NA
NA
10
11
12
13
14
1
2
3
4
5
6
7
8
9
ENABLE#_D
ENABLE#_C
ENABLE#_B
ENABLE#_A
4
ENABLE_D
ENABLE_C
ENABLE_B
ENABLE_A
PIN NAME
SEQ_EN#
SEQ_EN
Nominal V
ISL8702 V
FAULT
TIME
GND
OV
V
UV
TC
TD
TB
IN
IN
IN
SYMBOL
I
V
= 2.5V to +24V, T
= 2.5V to +12V (Continued)
I
I
VIN_2.2V
VIN_12V
VIN_24V
Active low open drain sequenced output. Sequenced on after ENABLE#_C and first output to
sequence off for the ISL8701. Tracks V
Active high open drain sequenced output. Sequenced on after ENABLE_C and first output to
sequence off for the ISL8700, ISL8702. Pulls low with V
Active low open drain sequenced output. Sequenced on after ENABLE#_B and sequenced off after
ENABLE#_D for the ISL8701. Tracks V
Active high open drain sequenced output. Sequenced on after ENABLE_B and sequenced off after
ENABLE_D for the ISL8700, ISL8702. Pulls low with V
Active low open drain sequenced output. Sequenced on after ENABLE#_A and sequenced off after
ENABLE#_C for the ISL8701. Tracks V
Active high open drain sequenced output. Sequenced on after ENABLE_A and sequenced off after
ENABLE_C for the ISL8700, ISL8702. Pulls low with V
Active low open drain sequenced output. Sequenced on after CTIME period and sequenced off after
ENABLE#_B for the ISL8701. Tracks V
Active high open drain sequenced output. Sequenced on after CTIME period and sequenced off after
ENABLE_B for the ISL8700, ISL8702. Pulls low with V
The voltage on this pin must be under its 1.22V Vth or the four ENABLE outputs will be immediately
pulled down. Conversely the 4 ENABLE# outputs will be released to be pulled high via external pull
ups.
The voltage on this pin must be over its 1.22V Vth or the four ENABLE outputs will be immediately
pulled down. Conversely the 4 ENABLE# outputs will be released to be pulled high via external pull
ups.
IC ground.
The V
pulled high to a voltage equal to or less than V
This pin provides a sequence on signal input with a high input. Internally pulled high to V
This pin provides a sequence on signal input with a low input. Internally pulled high to V
This pin provides a 2.6µA current output so that an adjustable V
delay period is created with a capacitor to ground.
A resistor connected from this pin to ground determines the time delay from ENABLE_A being active
to ENABLE _B being active on turn-on and also going inactive on turn-off via the SEQ_IN input.
A resistor connected from this pin to ground determines the time delay from ENABLE_B being active
to ENABLE _C being active on turn-on and also going inactive on turn-off via the SEQ_IN input.
A resistor connected from this pin to ground determines the time delay from ENABLE_C being active
to ENABLE _D being active on turn-on and also going inactive on turn-off via the SEQ_IN input.
IC Bias Pin Nominally 2.5V to 24V (2.5V to 12V for ISL8702). This pin requires a 1µF decoupling
capacitor close to IC pin.
IN_POR
ISL8700, ISL8701, ISL8702
IN
voltage when not within the desired UV to OV window will cause FAULT to be released to be
V
V
V
V
IN
IN
IN
IN
A
= 2.2V
= 12V
= 24V
low to high
= T
J
= -40°C to +85°C, Unless Otherwise Specified.
TEST CONDITIONS
FUNCTION DESCRIPTION
IN
IN
IN
IN
upon bias.
upon bias.
upon bias.
upon bias.
IN
via an external resistor.
IN
IN
IN
IN
< 1V.
< 1V.
< 1V.
< 1V.
MIN
IN
-
-
-
-
valid to sequencing on and off start
TYP
2.08
191
246
286
MAX
400
2.5
-
-
IN
IN
March 21, 2008
.
.
FN9250.2
UNIT
µA
µA
µA
V