ISL8843_06 INTERSIL [Intersil Corporation], ISL8843_06 Datasheet - Page 8

• Manufacturer Part Number: ISL8843_06
• Description: Industry Standard Single-Ended Current Mode PWM Controller
• Manufacturer: INTERSIL [Intersil Corporation]

OUT - This is the drive output to the power switching device.
It is a high current output capable of driving the gate of a
power MOSFET with peak currents of 1.0A. This GATE
output is actively held low when V
threshold.
V
supply current will depend on the load applied to OUT. Total
I
average output current. Knowing the operating frequency, f,
and the MOSFET gate charge, Qg, the average output
current can be calculated from:
To optimize noise immunity, bypass V
ceramic capacitor as close to the V
possible.
VREF - The 5.00V reference voltage output. +1.0/-1.5%
tolerance over line, load and operating temperature. Bypass
to GND with a 0.1µF to 3.3µF capacitor to filter this output as
needed.
Functional Description
Features
The ISL8843 current mode PWM makes an ideal choice for
low-cost flyback and forward topology applications. With its
greatly improved performance over industry standard parts,
it is the obvious choice for new designs or existing designs
which require updating.
Oscillator
The ISL8843 has a sawtooth oscillator with a programmable
frequency range to 2MHz, which can be programmed with a
resistor from VREF and a capacitor to GND on the RTCT
pin. (Please refer to Figure 4 for the resistor and capacitance
required for a given frequency.)
Soft-Start Operation
Soft-start must be implemented externally. One method,
illustrated below, clamps the voltage on COMP.
I
DD
OUT
DD
current is the sum of the operating current and the
- V
=
DD
Qg
D1
C1
×
is the power connection for the device. The total
f
FIGURE 5. SOFT-START
R1
Q1
8
VREF
COMP
GND
DD
DD
is below the UVLO
DD
and GND pins as
to GND with a
(EQ. 5)
ISL8843
The COMP pin is clamped to the voltage on capacitor C1
plus a base-emitter junction by transistor Q1. C1 is charged
from VREF through resistor R1 and the base current of Q1.
At power-up C1 is fully discharged, COMP is at ~0.7V, and
the duty cycle is zero. As C1 charges, the voltage on COMP
increases, and the duty cycle increases in proportion to the
voltage on C1. When COMP reaches the steady state
operating point, the control loop takes over and soft start is
complete. C1 continues to charge up to VREF and no longer
affects COMP. During power down, diode D1 quickly
discharges C1 so that the soft start circuit is properly
initialized prior to the next power on sequence.
Gate Drive
The ISL8843 is capable of sourcing and sinking 1A peak
current. To limit the peak current through the IC, an optional
external resistor may be placed between the totem-pole
output of the IC (OUT pin) and the gate of the MOSFET. This
small series resistor also damps any oscillations caused by
the resonant tank of the parasitic inductances in the traces of
the board and the FET’s input capacitance.
Slope Compensation
For applications where the maximum duty cycle is less than
50%, slope compensation may be used to improve noise
immunity, particularly at lighter loads. The amount of slope
compensation required for noise immunity is determined
empirically, but is generally about 10% of the full scale
current feedback signal. For applications where the duty
cycle is greater than 50%, slope compensation is required to
prevent instability.
Slope compensation may be accomplished by summing an
external ramp with the current feedback signal or by
subtracting the external ramp from the voltage feedback
error signal. Adding the external ramp to the current
feedback signal is the more popular method.
From the small signal current-mode model [1] it can be
shown that the naturally-sampled modulator gain, Fm,
without slope compensation, is
Fm
where Sn is the slope of the sawtooth signal and Tsw is the
duration of the half-cycle. When an external ramp is added,
the modulator gain becomes
Fm
where Se is slope of the external ramp and
m
The criteria for determining the correct amount of external
ramp can be determined by appropriately setting the
damping factor of the double-pole located at the switching
c
=
=
=
1
------------------- -
SnTsw
-------------------------------------- -
(
Sn
+
1
Se
-------
Sn
+
Se
1
)Tsw
=
--------------------------- -
m
c
SnTsw
1
January 3, 2006
(EQ. 6)
(EQ. 8)
(EQ. 7)
FN9238.1