XTR108EA-2K5 BURR-BROWN [Burr-Brown Corporation], XTR108EA-2K5 Datasheet - Page 26

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XTR108EA-2K5

Manufacturer Part Number
XTR108EA-2K5
Description
Manufacturer
BURR-BROWN [Burr-Brown Corporation]
Datasheet
COMMUNICATIONS WITH THE XTR108 USING A
MICROCONTROLLER
When communicating with the XTR108, special care must
be taken to avoid getting a false clock. When CS1 is driven
low, the false clock is generated because the microcontroller
clock pin is in high-impedance state, which forces the clock
pin to a logic high. Immediately after CS1 is driven low, the
microcontroller drives the clock pin low. This sequence
creates a glitch that the XTR interprets as a clock; see Figure
16. This condition can be avoided by driving the SCLK pin
low just prior to applying CS1 low; see Figure 17. A series
resistance should be placed between the microcontroller and
the XTR108 because driving SCLK low before CS1 can
create a bus contention; see Figure 18.
FIGURE 16. False Clock.
26
(Pulled high by the pull-up
SCLK is in High Z mode
in the XTR108)
SCLK
CS1
SCLK will be high immediately
after CS1 is driven low. This is
seen by the XTR108 as an
false clock.
www.ti.com
FIGURE 17. Proper Method to Drive the XTR108 to Avoid
FIGURE 18. Resistor Protects XTR108 and Microcontroller
(Pulled high by the pull-up
SCLK is in High Z mode
False Clock.
During Bus Contention.
V
in the XTR108)
CC
XTR108
SCLK
CS1
CS2
DIO
SCLK
CS1
CS
Memory
SCLK
SCLK is driven low by the
microcontroller just before
CS1 is driven low.
1k
DIO
SCLK
DIO
Microcontroller
XTR108
SBOS187C

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