HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 498
HD6417641
Manufacturer Part Number
HD6417641
Description
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417641.pdf
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Section 13 Direct Memory Access Controller (DMAC)
Rev. 4.00 Sep. 14, 2005 Page 448 of 982
REJ09B0023-0400
Figure 13.21 Example of DREQ Input Detection in Cycle Steal Mode Level Detection
Bus cycle
DREQ
(Overrun 0,
high-level)
DACK
(High-active)
Bus cycle
DREQ
(Overrun 1,
high-level)
DACK
(High-active)
CKIO
CKIO
1st acceptance
Non-sensitive period
1st acceptance
Non-sensitive period
CPU
CPU
When DACK is Divided to 4 by Idle Cycles
2nd acceptance
Non-sensitive period
2nd acceptance 3rd acceptance possible
Non-sensitive period
3rd acceptance possible
DMAC write
DMAC write
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