HD6417641 RENESAS [Renesas Technology Corp], HD6417641 Datasheet - Page 583
HD6417641
Manufacturer Part Number
HD6417641
Description
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417641.pdf
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Table 18.11 TIORL_0 (Channel 0)
[Legend]
X: Don't care
Notes: 1. The low level output is retained until TIOR contents is specified after a power-on reset
Bit 7
IOD3
0
1
2. When the BFB bit in TMDR_0 is set to 1 and TGRD_0 is used as a buffer register, this
Bit 6
IOD2
0
1
0
1
and entering standby mode.
setting is invalid and input capture/output compare is not generated.
Bit 5
IOD1
0
1
0
1
0
1
X
Bit 4
IOD0
0
1
0
1
0
1
0
1
0
1
X
X
TGRD_0
Function
Output
compare
register*
Input capture
register*
2
2
TIOC0D Pin Function
Output hold*
Initial output is 0
0 output at compare match
Initial output is 0
1 output at compare match
Initial output is 0
Toggle output at compare match
Output hold
Initial output is 1
0 output at compare match
Initial output is 1
1 output at compare match
Initial output is 1
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Capture input source is channel 1/count clock
Input capture at TCNT_1 count-up/count-down*
Section 18 Multi-Function Timer Pulse Unit (MTU)
Description
Rev. 4.00 Sep. 14, 2005 Page 533 of 982
1
REJ09B0023-0400
2
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