HA456_06 INTERSIL [Intersil Corporation], HA456_06 Datasheet - Page 7

• Manufacturer Part Number: HA456_06
• Description: 120MHz, Low Power, 8x8 Video Crosspoint Switch
• Manufacturer: INTERSIL [Intersil Corporation]

Figure 2 shows a typical application of the HA456 with
HFA1412 quad, gain-of-two buffers at the outputs to drive
75Ω loads. This application shows the HA456 digital-switch
control interface set up in the 7-bit parallel mode. The HA456
uses 7 data lines and 3 control lines (WR, CE and LATCH).
The input/output information is presented to the chip at A2:0
and D3:0 by a parallel printer port. The data is stored in the
Master Registers on the rising edge of WR. When the
LATCH line goes high, the switch configuration loads into the
Slave Registers, and all 8 outputs reconfigure at the same
time. Each 7-bit word updates only one output at a time.
Selects
Output
Being
Programmed
Address
Inputs are
Irrelevant for
These
Functions
0000 to 0111
1011 to 1111
A2:0
SER/PAR
1000
1001
1010
D3:0
H
L
L
0000 to 0111
1001 or 1010
D3:0
1000
1011
1100
1101
1110
1111
Connect the output to the input channel defined by D3:0. Doesn’t enable a disabled output.
Connect the output to GND. Doesn’t enable a disabled output.
Enable the output and connect it to GND. The default power-up state is all outputs disabled, so use this code to enable
outputs after power is applied, but before programming the switch configuration.
Disable the output. The output is no longer associated with any input channel; the desired input must be redefined after
re enabling the output.
Do not use these codes in the serial programming mode.
D3
H
X
L
7
Connect the input defined by D3:0 to the output selected by A2:0. Doesn’t enable a disabled output.
Connect the output selected by A2:0 to GND. Doesn’t enable a disabled output.
Asynchronously disable the single output selected by A2:0, and leave the Master Register unchanged.
Asynchronously enable the single output selected by A2:0, and leave the Master Register unchanged.
Asynchronously disable all outputs, and leave the Master Register unchanged.
Asynchronously enable all outputs, and leave the Master Register unchanged.
Send a Software “Latch” pulse to the Slave Register to load it from the Master Register, iff, the LATCH input=1.
If the LATCH input=0, then this command is a NOP. The Master Register is unchanged by this command.
Do not use these codes in the parallel programming mode. These codes are for serial programming only.
Parallel Data
Parallel Data
TABLE 3. DEFINITION OF DATA AND ADDRESS BIT FUNCTIONS
Input
Input
D2
X
TABLE 1. PARALLEL INTERFACE COMMANDS
TABLE 2. SERIAL INTERFACE COMMANDS
Parallel Data
Parallel Data
Serial Data
Output
Input
Input
D1
HA456
Serial Data Input
Parallel Data
Parallel Data
If several outputs are to be updated, the data is individually
loaded into the Master Registers. Then, a single LATCH
pulse can reconfigure all channels simultaneously.
An IBM compatible PC loads the programming data into the
HA456 via its parallel port (LPT1) using a simple BASIC
program.
Input
Input
D0
ACTION
ACTION
Address
Address
Output
Output
A2:0
X
Parallel Mode; D2:0 define the Input
Parallel Mode; D2:0 define the
command to be executed
32-Bit Serial Mode
COMMENT
Channel
August 14, 2006
FN4153.5