HC5503PRCBZ INTERSIL [Intersil Corporation], HC5503PRCBZ Datasheet - Page 6
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HC5503PRCBZ
Manufacturer Part Number
HC5503PRCBZ
Description
Low Cost SLIC For Large Telecom Switches
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet
1.HC5503PRCBZ.pdf
(11 pages)
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Pin Descriptions
NOTE: All grounds (AG, BG, and DG) must be applied before V
to run separate grounds off a line card, the AG must be applied first.
DIP/SOIC
24 PIN
15
16
17
18
19
20
21
22
23
24
18,24, 29,
2, 17,
7 x 7
QFN
30,
15
16
20
21
22
23
25
26
27
(Continued)
SYMBOL
OUT
+IN
PD
RC
NC
RX
AG
NC
-IN
C
TX
6
2
Power Denial - A low active TTL - Compatible logic input. When enabled, the ring feed voltage collapses
to the tip feed voltage (~4V). The DC feed is disabled, but the AC transmission is maintained. The switch
hook detect (SHD) is not necessarily valid, and the relay driver (RD) output is disabled.
Ring Command - A low active TTL - Compatible logic input. When enabled, the relay driver (RD) output
goes low on the next high level of the ring sync (RS) input, as long as the SLIC is not in the power denial
state (PD = 0) or the subscriber is not already off- hook (SHD = 0).
Leave disconnected.
The analog output of the spare operational amplifier.
The inverting analog input of the spare operational amplifier.
The non-inverting analog input of the spare operational amplifier.
Receive Input, Four Wire Side - A high impedance analog input which is internally biased. Capacitive
coupling to this input is required. AC signals appearing at this input differentially drive the Tip feed and
Ring feed terminals.
Capacitor #2 - An external capacitor to be connected between this terminal and analog ground. This
capacitor is required for the proper operation of ring trip detection. Recommended value 0.82µF ±10%
10V non-polarized.
Analog Ground - To be connected to zero potential and serves as a reference for the transmit output (TX)
and receive input (RX) terminals.
Transmit Output, Four Wire Side - A low impedance analog output proportional to the loop current.
Transhybrid balancing must be performed beyond this output to completely implement two to four wire
conversion. This output is unbalanced and referenced to analog ground. Since the DC level of this output
varies with loop current, capacitive coupling to the next stage is essential.
No internal connection.
B
HC5503PRC
+ or V
B
-. Failure to do so may result in premature failure of the part. If a user wishes
DESCRIPTION