ADL5243-EVALZ AD [Analog Devices], ADL5243-EVALZ Datasheet

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ADL5243-EVALZ

Manufacturer Part Number
ADL5243-EVALZ
Description
100 MHz to 4000 MHz RF/IF Digitally Controlled VGA
Manufacturer
AD [Analog Devices]
Datasheet
Data Sheet
FEATURES
Operating frequency from 100 MHz to 4000 MHz
Digitally controlled VGA with serial and parallel interfaces
6-bit, 0.5 dB digital step attenuator
31.5 dB gain control range with ±0.25 dB step accuracy
Gain Block Amplifier 1
¼ W Driver Amplifier 2
Gain block, DSA, or ¼ W driver amplifier can be first
Low quiescent current of 175 mA
The companion
APPLICATIONS
Wireless infrastructure
Automated test equipment
RF/IF gain control
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Gain: 19.2 dB at 2140 MHz
OIP3: 40.2 dBm at 2140 MHz
P1dB: 19.8 dBm at 2140 MHz
Noise figure: 2.9 dB at 2140 MHz
Gain: 14.2 dB at 2140 MHz
OIP3: 41.1 dBm at 2140 MHz
P1dB: 26.0 dBm at 2140 MHz
Noise figure: 3.7 dB at 2140 MHz
ADL5240
integrates a gain block with DSA
AMP1OUT/VCC
DSAIN
VDD
NC
NC
NC
NC
NC
1
2
3
4
5
6
7
8
32
FUNCTIONAL BLOCK DIAGRAM
9
0.5dB
AMP1
31
10
1dB
SERIAL/PARALLEL INTERFACE
30
11
2dB
ADL5243
Figure 1.
29
12
28
4dB
13
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
GENERAL DESCRIPTION
The
variable gain amplifier operating from 100 MHz to 4000 MHz.
The VGA integrates two high performance amplifiers and a
digital step attenuator (DSA). Amplifier 1 (AMP1) is an
internally matched gain block amplifier with 20 dB gain, and
Amplifier 2 (AMP2) is a broadband ¼ W driver amplifier. The
DSA is 6-bit with a 31.5 dB gain control range, 0.5 dB steps, and
±0.25 dB step accuracy. The attenuation of the DSA can be
controlled using a serial or parallel interface.
The gain block and DSA are internally matched to 50 Ω at their
inputs and outputs, and all three internal devices are separately
biased. The separate bias allows all or part of the
used, which allows for easy reuse throughout a design. The
pinout of the
¼ W driver amplifier to be first, giving the VGA maximum
flexibility in a signal chain.
The
supply ranging from 4.75 V to 5.25 V. The VGA is packaged in a
thermally efficient, 5 mm × 5 mm, 32-lead LFCSP and is fully
specified for operation from −40°C to +85°C. A fully populated
evaluation board is available.
RF/IF Digitally Controlled VGA
27
14
ADL5243
ADL5243
8dB
AMP2
26
15
16dB
ADL5243
is a high performance, digitally controlled
consumes 175 mA and operates off a single
25
16
100 MHz to 4000 MHz
24
23
22
21
20
19
18
17
VDD
NC
NC
DSAOUT
NC
AMP2IN
NC
NC
©2011 Analog Devices, Inc. All rights reserved.
also enables the gain block, DSA, or
ADL5243
www.analog.com
ADL5243
to be

Related parts for ADL5243-EVALZ

ADL5243-EVALZ Summary of contents

Page 1

... ADL5243 also enables the gain block, DSA, or consumes 175 mA and operates off a single 26 25 VDD DSAOUT 21 8dB 16dB NC 20 AMP2IN 19 AMP2 ©2011 Analog Devices, Inc. All rights reserved. ADL5243 ADL5243 to be www.analog.com ...

Page 2

... Applications Information .............................................................. 20 REVISION HISTORY 8/11—Rev Rev. A Changes to Features Section............................................................ 1 7/11—Revision 0: Initial Version   Basic Layout Connections......................................................... 20   SPI Timing................................................................................... 21   ADL5243 Amplifier 2 Matching .............................................. 23   ADL5243 Loop Performance.................................................... 26   Thermal Considerations............................................................ 26   Soldering Information and Recommended PCB Land Pattern................................................................................ 26   Evaluation Board ............................................................................ 27   ...

Page 3

... MHz dBm/tone OUT Using the AMP1IN and AMP1OUT pins ±18 MHz −40°C ≤ T ≤ +85° 5.25 V S11 S22 ∆ MHz dBm/tone OUT Rev Page ADL5243 Min Typ Max Unit 100 4000 MHz 18.2 dB ±0.97 dB ±0.07 dB ±0.03 dB − ...

Page 4

... ADL5243 Parameter AMPLIFIER 1 FREQUENCY = 1960 MHz Gain vs. Frequency vs. Temperature vs. Supply Input Return Loss Output Return Loss Output 1 dB Compression Point Output Third-Order Intercept Noise Figure AMPLIFIER 1 FREQUENCY = 2140 MHz Gain vs. Frequency vs. Temperature vs. Supply Input Return Loss Output Return Loss Output 1 dB Compression Point ...

Page 5

... Using the DSAIN and DSAOUT pins, minimum attenuation ±50 MHz −40°C ≤ T ≤ +85°C A Between maximum and minimum attenuation states All attenuation states All attenuation states ∆ MHz dBm/tone OUT Rev Page ADL5243 Min Typ Max Unit 16.5 dB ±0.05 dB ±0.39 dB ±0.10 dB − ...

Page 6

... ADL5243 Parameter DSA FREQUENCY = 450 MHz Insertion Loss vs. Frequency vs. Temperature Attenuation Range Attenuation Step Error Attenuation Absolute Error Input Return Loss Output Return Loss Input Third-Order Intercept DSA FREQUENCY = 748 MHz Insertion Loss vs. Frequency vs. Temperature Attenuation Range Attenuation Step Error Attenuation Absolute Error ...

Page 7

... OUT Using the DSAIN and DSAOUT pins AMP1–DSA–AMP2, DSA at minimum attenuation ±18 MHz Between maximum and minimum attenuation states S11 S22 ∆ MHz dBm/tone OUT Rev Page ADL5243 Min Typ Max Unit −2.6 dB ±0.02 dB ±0.19 dB 30.9 dB ± ...

Page 8

... ADL5243 Parameter LOOP FREQUENCY = 2140 MHz Gain vs. Frequency Gain Range Input Return Loss Output Return Loss Output 1 dB Compression Point Output Third-Order Intercept Noise Figure LOOP FREQUENCY = 2630 MHz Gain vs. Frequency Gain Range Input Return Loss Output Return Loss Output 1 dB Compression Point ...

Page 9

... Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION Rating 6 dBm 20 dBm 30 dBm 1.0 W 34.8°C/W 6.2°C/W 150°C 240°C −40°C to +85°C −65°C to +150°C Rev Page ADL5243 ...

Page 10

... D2/LE 30 D1/DATA 31 D0/CLK 32 SEL EPAD VDD 1 24 VDD PIN INDICATOR ADL5243 DSAIN 4 21 DSAOUT NC 5 TOP VIEW 20 NC (Not to Scale) AMP1OUT/VCC 6 19 AMP2IN NOTES CONNECT. DO NOT CONNECT TO THIS PIN. 2. THE EXPOSED PAD MUST BE CONNECTED TO GROUND. ...

Page 11

... P PER TONE (dBm) OUT Figure 7. AMP1: OIP3 vs. P and Frequency OUT 5.0 4.5 4.0 +85°C 3.5 +25°C 3.0 2.5 –40°C 2.0 1.5 0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 FREQUENCY (GHz) Figure 8. AMP1: Noise Figure vs. Frequency and Temperature ADL5243 3.2 3.6 748MHz 3.2 3 ...

Page 12

... ADL5243 0.925 0.930 0.935 0.940 0.945 0.950 FREQUENCY (GHz) Figure 9. AMP2–943 MHz: Gain, P1dB, OIP3 at P Figure vs. Frequency 18.0 17.5 –40°C 17.0 +25°C 16.5 +85°C 16.0 15.5 15.0 0.925 0.930 0.935 0.940 0.945 0.950 FREQUENCY (GHz) FREQUENCY (GHz) Figure 10. AMP2–943 MHz: Gain vs. Frequency and Temperature 0 – ...

Page 13

... Frequency and Temperature 42 2.17GHz 41 2.11GHz 40 2.14GHz –6 –4 – PER TONE (dBm) OUT Figure 19. AMP2–2140 MHz: OIP3 vs. P and Frequency OUT 5.5 5.0 +85°C 4.5 4.0 +25°C 3.5 –40°C 3.0 2.5 2.0 2.00 2.03 2.06 2.09 2.12 2.15 2.18 2.21 FREQUENCY (GHz) ADL5243 2.16 2. 2.24 2.27 2.30 ...

Page 14

... ADL5243 45 OIP3 P1dB 25 20 GAIN 2.57 2.59 2.61 2.63 FREQUENCY (GHz) Figure 21. AMP2–2630 MHz: Gain, P1dB, OIP3 at P Noise Figure vs. Frequency 15.0 14.5 14.0 –40°C 13.5 +25°C 13.0 +85°C 12.5 12.0 11.5 11.0 2.57 2.59 2.61 2.63 FREQUENCY (GHz) Figure 22. AMP2–2630 MHz: Gain vs. Frequency and Temperature 0 –5 S11 –10 S22 –15 –20 S12 – ...

Page 15

... ATTENUATION (dB) Figure 30. DSA: Absolute Error vs. Attenuation 0 –5 0dB 31.5dB 0.1 0.5 0.9 1.3 1.7 2.1 2.5 2.9 FREQUENCY (GHz) Figure 31. DSA: Input Return Loss vs. Frequency, All States 0 –5 0dB 31.5dB 0.1 0.5 0.9 1.3 1.7 2.1 2.5 2.9 FREQUENCY (GHz) Figure 32. DSA: Output Return Loss vs. Frequency, All States ADL5243 3.3 3.7 4.1 3.3 3.7 4.1 ...

Page 16

... ADL5243 36 IIP3 IP1dB 31 30 0.9 1.2 1.5 1.8 2.1 2.4 2.7 FREQUENCY (GHz) Figure 33. DSA: Input P1dB and Input IP3 vs. Frequency, Minimum Attenuation State 3 4 CH3 2.00V CH3 2.00V CH4 200mV M10ns 10GS/s IT 1.0ps/pt Figure 34. DSA: Gain Settling Time 31 CH3 2.00V CH3 2.00V ...

Page 17

... Frequency, Minimum OUT Attenuation State 45 OIP3 40 35 GAIN 30 P1dB 2.57 2.59 2.61 2.63 2.65 FREQUENCY (GHz dBm/Tone and Noise OUT Figure vs. Frequency, Minimum Attenuation State 5 0 S22 –5 –10 S11 –15 –20 –25 –30 –35 S12 –40 –45 –50 2.50 2.55 2.60 2.65 2.70 2.75 2.80 FREQUENCY (GHz) ADL5243 2.67 2.69 2.85 2.90 ...

Page 18

... ADL5243 42 2.69GHz 41 2.63GHz 2.57GHz PER TONE (dBm) OUT Figure 45. Loop–2630 MHz: OIP3 vs. P and Frequency, Minimum OUT Attenuation State 110 105 100 –40 –30 –20 – TEMPERATURE (°C) Figure 46 ...

Page 19

... Figure 53. AMP2: P1dB Distribution at 2140 MHz Figure 54. AMP2: OIP3 Distribution at 2140 MHz Figure 55. AMP2: Noise Figure Distribution at 2140 MHz Rev Page ADL5243 OIP3 (dBm) NOISE FIGURE (dB) ...

Page 20

... VCC ADL5243 are shown in Figure 56. The schematic is configured for 2140 MHz operation. SERIAL PARALLEL INTERFACE VDD VDD VDD DSAIN DSAOUT ADL5243 AMP1OUT/VCC AMP2IN 9.5nH C21 0.1µF AMP1IN C22 ...

Page 21

... Additionally, bias is provided through this pin. Figure 56 shows the output matching components and is configured for 2140 MHz. DSA RF Input Interface Pin 4 is the RF input for the DSA of the ADL5243. The input impedance of the DSA is close to 50 Ω over the entire frequency range; therefore, no external components are required. Only a dc blocking capacitor (C1) is required ...

Page 22

... ADL5243 CLK t 3 DATA LE D0/CLK D1/DATA D2/LE D6 Table 6. DSA Attenuation Truth Table—Serial Mode Attenuation State B5 (MSB (Reference Table 7. DSA Attenuation Truth Table—Parallel Mode Attenuation State D1 (MSB (Reference ...

Page 23

... C22 5 1.3 pF Open 6 pF 1 Open 10 pF 1.3 pF C28: λ2 (mils) 315 N/A 366 N/A Rev Page ADL5243 C23 L2 R10 100 Ω 100 Ω 9 Ω 9 Ω C22: λ3 (mils) 201 394 244 ...

Page 24

... OPEN 56nH λ3 R12 3.9nH C22 1.3pF C23 100pF AMP2OUT Figure 59. AMP2: Matching Circuit at 748 MHz NC 20 λ2 ADL5243 λ1 AMP2IN 19 C27 C26 0Ω 3.9pF 56nH λ3 R12 3.3nH C22 1.3pF C23 ...

Page 25

... AMP2IN 19 C27 C26 2.7pF 1.1pF 9.5nH λ3 R12 0Ω C22 1.3pF C23 20pF AMP2OUT Figure 62. AMP2: Matching Circuit at 2630 MHz Rev Page R10 AMP2IN 0Ω C28 C8 1.8pF 10pF R10 AMP2IN 0Ω C28 C8 OPEN 10pF ADL5243 ...

Page 26

... VCC2 SOLDERING INFORMATION AND RECOMMENDED PCB LAND PATTERN Figure 64 shows the recommended land pattern for the ADL5243. To minimize thermal impedance, the exposed paddle on the 5 mm × LFCSP package is soldered down to a ground plane. To improve thermal dissipation, 25 thermal vias are ...

Page 27

... C28 = 1 366 mils from edge of package C25 = 10 nF C20 = 10 μ 9.5 nH C17 = 0.1 μF R10, R12 = 0 Ω R3, R4, R5, R6, R7, R8 Ω C9, C10, C11, C12, C16, C18, C19 = open C2, C6, C7, C24 = open R1 open 3-pin rocker 9-pin connector Rev Page ADL5243 evaluation board in the ...

Page 28

... AGND C26 DNI AGND AGND L2 VCC2 9.5nH R12 0Ω C3 C25 10pF 10nF C22 1pF C23 10pF AMP2OUT Figure 65. ADL5243 Evaluation Board Rev Page Data Sheet DATA CLK LE R5 0Ω 0Ω R8 0Ω R9 0Ω 0Ω C16 C18 C19 DNI ...

Page 29

... Data Sheet Figure 66. Evaluation Board Layout—Top Figure 67. Evaluation Board Layout—Bottom Rev Page ADL5243 ...

Page 30

... ADL5243 OUTLINE DIMENSIONS PIN 1 INDICATOR 12° MAX 1.00 0.85 0.80 SEATING PLANE ORDERING GUIDE 1 Model Temperature Range ADL5243ACPZ-R7 −40°C to +85°C ADL5243-EVALZ RoHS Compliant Part. 5.00 BSC SQ 0.60 MAX 25 24 0.50 4.75 BSC BSC 0.50 TOP VIEW 0.40 0.80 MAX 0.30 0.65 TYP 0.05 MAX 0.02 NOM COPLANARITY 0.30 0.08 0.25 0.20 REF 0.18 COMPLIANT TO JEDEC STANDARDS MO-220-VHHD-2 Figure 68. 32-Lead Lead Frame Chip Scale Package [LFCSP_VQ × ...

Page 31

... Data Sheet NOTES Rev Page ADL5243 ...

Page 32

... ADL5243 NOTES ©2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09431-0-8/11(A) Rev Page Data Sheet ...

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