ADL5310-EVAL AD [Analog Devices], ADL5310-EVAL Datasheet

ADL5310-EVAL

Manufacturer Part Number

ADL5310-EVAL

Description

120 dB Range (3 nA to 3 mA) Dual Logarithmic Converter

Manufacturer

AD [Analog Devices]

Datasheet

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FEATURES

2 independent channels optimized for photodiode

6-decade input dynamic range

Temperature-stable logarithmic outputs

Nominal slope 10 mV/dB (200 mV/dec), externally scalable

Intercepts may be independently set by external resistors

User-configurable output buffer amplifiers

Single- or dual-supply operation

Space-efficient, 24-lead 4 mm × 4 mm LFCSP

Low power: < 10 mA quiescent current

APPLICATIONS

Gain and absorbance measurements

Multichannel power monitoring

General-purpose baseband log compression

PRODUCT DESCRIPTION

The ADL5310

input current over a wide dynamic range to a linear-in-dB

output voltage. It is optimized to determine the optical power

in wide-ranging optical communication system applications,

including control circuitry for lasers, optical switches, atten-

uators, and amplifiers, as well as system monitoring. The device

is equivalent to a dual AD8305 with enhanced dynamic range

(120 dB). While the ADL5310 contains two independent signal

channels with individually configurable transfer function

constants (slope and intercept), internal bias circuitry is shared

between channels for improved power consumption and

channel matching. Dual converters in a single, compact LFCSP

package yield space-efficient solutions for measuring gain or

attenuation across optical elements. Only a single supply is

required; optional dual-supply operation offers added flexibility.

The ADL5310 employs an optimized translinear structure that

use the accurate logarithmic relationship between a bipolar

transistor’s base emitter voltage and collector current, with

appropriate scaling by precision currents to compensate for the

inherent temperature dependence. Input and reference current

pins sink current ranging from 3 nA to 3 mA (limited to ±60 dB

between input and reference) into a fixed voltage defined by the

VSUM potential. The VSUM potential is internally set to

500 mV but may be externally grounded for dual-supply opera-

tion, and for additional applications requiring voltage inputs.

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

interfacing

Law conformance 0.3 dB from 3 nA to 3 mA

low cost, dual logarithmic amplifier converts

The logarithmic slope is set to 10 mV/dB (200 mV/decade)

nominal and can be modified using external resistors and the

independent buffer amplifiers. The logarithmic intercepts for

each channel are defined by the individual reference currents,

which are set to 3 μA nominal for maximum input range by

connecting 665 kΩ resistors between the 2.5 V VREF pins and

the IRF1 and IRF2 inputs. Tying VRDZ to VREF effectively sets

the x-intercept four decades below the reference current—

typically 300 pA for a 3 µA reference.

The use of individually optimized reference currents may

be valuable when using the ADL5310 for gain or absorbance

measurements where each channel input has a different current-

range requirement. The reference current inputs

are also fully functional dynamic inputs, allowing log ratio

operation with the reference input current as the denominator.

The ADL5310 is specified for operation from –40°C to +85°C.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.326.8703

US Patents: 4,604,532, 5,519,308. Other patents pending.

BIAS

PD1

PD2

120 dB Range (3 nA to 3 mA)

VSUM

Dual Logarithmic Converter

INP1

INP2

IRF1

IRF2

FUNCTIONAL BLOCK DIAGRAM

COMM

20kΩ

665kΩ

0.5V

VNEG

VREF

80kΩ

2.5V

Figure 1.

VRDZ

COMPENSATION

TEMPERATURE

GENERATOR

REFERENCE

COMM

6.69kΩ

14.2kΩ

6.69kΩ

LOG

ADL5310

www.analog.com

451Ω

OUT1

SCL1

BIN1

LOG1

OUT2

SCL2

BIN2

LOG2

OUT1

OUT2

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