ADL5336-EVALZ AD [Analog Devices], ADL5336-EVALZ Datasheet - Page 4

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ADL5336-EVALZ

Manufacturer Part Number
ADL5336-EVALZ
Description
Cascadable IF VGAs
Manufacturer
AD [Analog Devices]
Datasheet
Parameter
SQUARE LAW DETECTORS
DIGITAL LOGIC
SPI TIMING
POWER AND ENABLE
ADL5336
f = 350 MHz
Output Setpoint
Output Range
AGC Step Response Range
Input High Voltage, V
Input Low Voltage, V
Input Current, I
Input Capacitance, C
f
t
t
t
t
t
t
Supply Voltage Range
Total Supply Current
Disable Current
Disable Threshold
Enable Response Time
Disable Response Time
CLK
DH
DS
LH
LS
PW
D
Noise Figure
Output IP3
Output Voltage Level of 1.0 V p-p
Output P1dB
INH
/I
INL
INL
IN
INH
Test Conditions/Comments
VGA1, Gain Code 00, V
VGA2, Gain Code 11, V
VGA1, Gain Code 00, V
VGA1, Gain Code 11, V
VGA2, Gain Code 00, V
VGA2, Gain Code 11, V
VGA1, Gain Code 00, V
VGA1, Gain Code 11, V
VGA2, Gain Code 00, V
VGA2, Gain Code 11, V
DTO1, DTO2
SPI controlled, 3 dB steps
5 dB input step, C
LE, CLK, DATA, SDO
LE, CLK, DATA, SDO
DATA hold time
DATA setup time
LE hold time
LE setup time
CLK high pulse width
CLK-to-SDO delay
VPOS, VPSD, COM, COMD, ENBL
ENBL = 5 V
ENBL = 0 V
Delay following low-to-high transition until
device meets full specifications in VGA mode
Delay following high-to-low transition until
device produces full attenuation in VGA mode
AGC
= 0.1 µF
GAIN
GAIN
GAIN
GAIN
GAIN
GAIN
GAIN
GAIN
GAIN
GAIN
Rev. B | Page 4 of 32
= 1 V
= 1 V
= 1 V
= 1 V
= 1 V
= 1 V
= 1 V
= 1 V
= 1 V
= 1 V
Min
−24
0.1
4.5
Typ
8
7.7
12 (19)
10.5(17.5)
18 (28)
16 (26)
0 (7)
0 (7)
−1.5 (+8.5)
−1.5 (+8.5)
1.5
>2.2
<1.8
20
5
5
5
5
5
5
5
80
4
2.3
800
20
Max
−3
V
<1
2
5.5
S
/2
Data Sheet
Unit
dB
dB
dBV (dBm)
dBV (dBm)
dBV (dBm)
dBV (dBm)
dBV (dBm)
dBV (dBm)
dBV (dBm)
dBV (dBm)
dBV
V
ms
V
V
µA
pF
MHz
ns
ns
ns
ns
ns
ns
V
mA
mA
V
ns
ns

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