ADL5360-EVALZ AD [Analog Devices], ADL5360-EVALZ Datasheet

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ADL5360-EVALZ

Manufacturer Part Number
ADL5360-EVALZ
Description
Dual 900MHz Balanced Mixer with Low Side LO Buffer, IF Amp, and RF Balun
Manufacturer
AD [Analog Devices]
Datasheet
Preliminary Technical Data
FEATURES
RF Frequency 700MHz to 1000MHz
IF Frequency 50MHZ to 350MHz
Power Conversion Gain of 8.5dB
SSB Noise Figure of 9.5dB
SSB NF with +10dBm blocker of 16.5dB
Input IP3 of 26dBm
Input P
Typical LO Drive of 0 dBm
Single-ended, 50Ω RF and LO Input Ports
High Isolation SPDT LO Input Switch
Single Supply Operation: 3.3 to 5 V
Exposed Paddle 6 x 6 mm, 36 Lead LFCSP Package
APPLICATIONS
Cellular Base Station Receivers
Main and Diversity Receiver Designs
Radio Link Downconverters
GENERAL DESCRIPTION
The ADL5360 utilizes two highly linear doubly balanced passive
mixer cores along with integrated RF and LO balancing
circuitry to enable single-ended operation. The ADL5360
incorporates two RF baluns allowing for optimal main and
diversity mixer performance over a 700 to 1000 MHz RF input
frequency range using low-side LO injection. The balanced
passive mixer arrangement provides good LO to RF leakage,
typically better than -25dBm, and excellent intermodulation
performance. The balanced mixer cores also provide extremely
high input linearity allowing the device to be used in
demanding cellular applications where in-band blocking signals
may otherwise result in the degradation of dynamic
performance. High linearity IF buffer amps follow the passive
mixer cores, to yield a typical power conversion gain of 9.5dB.
(For a higher IIP3 version of the dual mixer without the IF
amplifiers, please contact the factory).
The ADL5360 provides two switched LO paths that can be
utilized in TDD applications where it is desirable to rapidly
alternate between two local oscillators. LO current can be
externally set using a resistor to minimize DC current
REV. PrA
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
1dB
of 10 dBm
commensurate with the desired level of performance. An
additional 3V logic pin is provided to power down (<100uA)
the circuit when desired.
For low voltage applications, the ADL5360 is capable of
operation at voltages down to 3V with substantially reduced DC
current.
The ADL5360 is fabricated using a BiCMOS high performance
IC process. The device is available in a 6mm x 6mm 36-lead
LFCSP package and operates over a −40°C to +85°C
temperature range. An evaluation board is also available.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
Dual 900MHz Balanced Mixer
Figure 1. Functional Block Diagram
with Low Side LO Buffer,
© 2008 Analog Devices, Inc. All rights reserved.
IF Amp, and RF Balun
www.analog.com
ADL5360

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ADL5360-EVALZ Summary of contents

Page 1

... IIP3 version of the dual mixer without the IF amplifiers, please contact the factory). The ADL5360 provides two switched LO paths that can be utilized in TDD applications where it is desirable to rapidly alternate between two local oscillators. LO current can be externally set using a resistor to minimize DC current REV ...

Page 2

... ADL5360 ADL5360—Specifications at V Table 25° 900 MHz Parameter RF INPUT INTERFACE Return Loss Input Impedance RF Frequency Range OUTPUT INTERFACE Output Impedance IF Frequency Range 1 DC Bias Voltage LO INTERFACE LO Power Return Loss Input Impedance LO Frequency Range DYNAMIC PERFORMANCE ...

Page 3

... Preliminary Technical Data ADL5360—Specifications at VS=3.3v Table 3 25° 900 MHz Parameter DYNAMIC PERFORMANCE Power Conversion Gain Voltage Conversion Gain SSB Noise Figure Input Third Order Intercept Input Second Order Intercept Input 1 dB Compression Point POWER INTERFACE Supply Voltage Quiescent Current = 703 MHz, LO power = 0 dBm 50Ω ...

Page 4

... ADL5360 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Supply Voltage, V POS PWDN, LOSW, VGS0, VGS1, VGS2 RF Input Power, DVIN, MNIN Internal Power Dissipation θ (Exposed Paddle Soldered Down) JA θ (At Exposed Paddle) JC Maximum Junction Temperature Operating Temperature Range Storage Temperature Range Stresses above those listed under Absolute Maximum Ratings Rating may cause permanent damage to the device ...

Page 5

... Main Channel External Inductor. Connect 10nH inductor to ground for typical operation. 32, 33 MNOP, MNON Main Channel Differential Open-Collector Outputs. MNOP and MNON should be pulled-up to VCC using pull- up choke inductors. 35 MNGM Main Amplifier Bias Setting. Connect 1.2kΩ resistor to ground for typical operation. Figure 2. Pin Configuration REV. PrA | Page ADL5360 ...

Page 6

... ADL5360 TYPICAL PERFORMANCE CHARACTERISTICS– 25°C, as measured using typical circuit schematic with low-side LO unless otherwise noted Figure 3. Conversion Gain versus RF Frequency Figure 4. IIP3 versus RF Frequency Figure 5. IP1dB versus RF Frequency Preliminary Technical Data PRELIMINARY DATA Figure 6. Single-Sideband NF versus RF Frequency Figure 7 ...

Page 7

... Preliminary Technical Data EVALUATION BOARD SCHEMATIC Figure 9. Evaluation Board Schematic. REV. PrA | Page ADL5360 ...

Page 8

... ADL5360 Table 3. Eval Board Configuration Components Function C1, C4, C5, C8, C10, C12, Power Supply Decoupling. Nominal supply decoupling consists a C13, C15, C18, C21, C22, 0.01 μF capacitor to ground in parallel with 10pF capacitors to C23, C24, C25, C26 ground positioned as close to the device as possible. Z1-Z4, C2, C3, C6, C7, C9, RF Main and Diversity Input Interface ...

Page 9

... Temperature Models Range ADL5360XCPZ-R7 −40°C to +85°C ADL5360XCPZ-WP −40°C to +85°C ADL5360-EVALZ Figure 10. 36-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 6mm × Body, Very Thin Quad (CP-36-1)) Dimensions shown in millimeters Package Description 36-Lead Lead Frame Chip Scale Package [LFCSP_VQ] ...

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