ADA4896-2 AD [Analog Devices], ADA4896-2 Datasheet - Page 9

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ADA4896-2

Manufacturer Part Number
ADA4896-2
Description
1 nV/?Hz, Low Power, Rail-to-Rail Output Amplifiers
Manufacturer
AD [Analog Devices]
Datasheet

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ABSOLUTE MAXIMUM RATINGS
Table 6.
Parameter
Supply Voltage
Power Dissipation
Common-Mode Input Voltage
Differential Input Voltage
Storage Temperature Range
Operating Temperature Range
Lead Temperature (Soldering 10 sec)
Junction Temperature
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θ
specified for a device soldered in a circuit board for surface-
mount packages. Table 7 lists the θ
ADA4897-1.
Table 7. Thermal Resistance
Package Type
8-Lead Dual MSOP (ADA4896-2)
8-Lead Dual LFCSP (ADA4896-2)
8-Lead Single SOIC (ADA4897-1)
6-Lead Single SOT-23 (ADA4897-1)
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation for the ADA4896-2/
ADA4897-1
temperature (T
is the glass transition temperature, the properties of the plastic
change. Even temporarily exceeding this temperature limit may
change the stresses that the package exerts on the die, perma-
nently shifting the parametric performance of the ADA4896-2/
ADA4897-1. Exceeding a junction temperature of 175°C for an
extended period of time can result in changes in silicon devices,
potentially causing degradation or loss of functionality. The
power dissipated in the package (P
power dissipation and the power dissipated in the die due to the
ADA4896-2/ADA4897-1
JA
is specified for the worst-case conditions, that is, θ
is limited by the associated rise in junction
J
) on the die. At approximately 150°C, which
drive at the output.
JA
D
) is the sum of the quiescent
for the ADA4896-2/
Rating
11 V
See Figure 3
−V
±0.7 V
−65°C to +125°C
−40°C to +125°C
300°C
150°C
S
θ
222
61
133
306
− 0.7 V to +V
JA
Unit
°C/W
°C/W
°C/W
°C/W
JA
S
is
+ 0.7 V
Rev. 0 | Page 9 of 28
The quiescent power is the voltage between the supply pins (V
multiplied by the quiescent current (I
RMS output voltages should be considered. If R
−V
I
worst case, when V
In single-supply operation with R
is V
Airflow increases heat dissipation, effectively reducing θ
Also, more metal directly in contact with the package leads and
exposed paddle from metal traces, through holes, ground, and
power planes, reduces θ
Figure 3 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the dual 8-lead LFCSP
(61°C/W), the dual 8-lead MSOP (222°C/W), the single 8-lead
SOIC (133°C/W), and the single 6-lead SOT-23 (306°C/W) on a
JEDEC standard 4-layer board. θ
ESD CAUTION
OUT
Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
S
, as in single-supply operation, the total drive power is V
. If the rms signal levels are indeterminate, consider the
OUT
P
P
P
D
3.5
3.0
2.5
2.0
1.5
1.0
0.5
D
D
= V
= Quiescent Power + (Total Drive Power – Load Power)
0
–45 –35 –25 –15 –5
=
=
T
(
(
V
V
6-LEAD SOT-23
J
S
/2.
= 150°C
S
S
×
×
I
I
S
S
)
) (
OUT
+
+
8-LEAD MSOP
V
8-LEAD SOIC
AMBIENT TEMPERAURE (°C)
V
= V
5
2
S
R
JA
S
4 /
.
L
15 25 35 45 55 65 75 85 95 105 115 125
×
S
)
/4 for R
ADA4896-2/ADA4897-1
2
V
R
OUT
L
8-LEAD LFCSP
JA
L
referenced to −V
values are approximations.
L
to midsupply.
V
S
).
OUT
R
L
2
L
is referenced to
S
, worst case
JA
.
S
×
S
)

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