LT5528 LINER [Linear Technology], LT5528 Datasheet - Page 11

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LT5528

Manufacturer Part Number
LT5528
Description
1.5GHz to 2.4GHz High Linearity Direct Quadrature Modulator
Manufacturer
LINER [Linear Technology]
Datasheet

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APPLICATIO S I FOR ATIO
The RF output S
Table 4.
Table 4. RF Port Output Impedance vs Frequency for EN = High
and No LO Power Applied
For EN = Low the S
Table 5. RF Port Output Impedance vs Frequency for EN = Low
To improve S
can be added to the output. At higher frequencies, a shunt
inductor can improve the S
circuit schematic of the RF output.
Note that an ESD diode is connected internally from
the RF output to ground. For strong output RF signal
levels (higher than 3dBm), this ESD diode can degrade
the linearity performance if the 50Ω termination imped-
ance is connected directly to ground. To prevent this, a
Frequency
Frequency
1000
1400
1600
1800
2000
2200
2400
2600
1000
1400
1600
1800
2000
2200
2400
2600
Figure 5. Equivalent Circuit Schematic of the RF Output
MHz
MHz
Output Impedance
Output Impedance
22
OUTPUT
37.7 + j18.5
47.0 + j14.3
29.6 + j11.6
32.4 + j20.8
42.4 + j25.1
54.6 + j20.1
for lower frequencies, a shunt capacitor
22
23.7 + j8.1
46.0 + j5.5
39.2 + j3.7
34.2 + j6.2
31.0 + j9.4
22.8 + j7.7
55.3 + j6.0
44.7 + j0.0
36.0 + j1.9
31.3 + j4.8
RF
U
with no LO power applied is given in
22
Ω
Ω
V
CC
is given in Table 5.
20pF
22
U
. Figure 5 shows the equivalent
3nH
0.371
0.248
0.149
0.071
0.127
0.201
0.260
0.292
0.386
0.321
0.274
0.193
0.076
0.056
0.164
0.237
Mag
Mag
W
21pF
5528 F05
52.5Ω
S
S
22
22
U
Angle
Angle
93.6
91.7
66.2
45.3
157
112
123
159
154
147
142
158
116
180
171
162
coupling capacitor can be inserted in the RF output line.
This is strongly recommended during a 1dB compression
measurement.
Enable Interface
Figure 6 shows a simplifi ed schematic of the EN pin in-
terface. The voltage necessary to turn on the LT5528 is
1V. To disable (shut down) the chip, the Enable voltage
must be below 0.5V. If the EN pin is not connected, the
chip is disabled. This EN = Low condition is guaranteed
by the 75k on-chip pull-down resistor. It is important that
the voltage at the EN pin does not exceed V
than 0.5V. If this should occur, the supply current could
be sourced through the EN pin ESD protection diodes,
which are not designed to carry the full supply current,
and damage may result.
Evaluation Board
Figure 7 shows the evaluation board schematic. A good
ground connection is required for the exposed pad. If this
is not done properly, the RF performance will degrade.
V
BBQM
CC
EN
LO
IN
Figure 7. Evaluation Circuit Schematic
J5
J4
BBIM
100Ω
R1
Figure 6. EN Pin Interface
EN
J1
1
2
3
4
GND
EN
GND
LO
GND
V
16
BBMQ GND
CC
BBMI
5
BOARD NUMBER: DC729A
15
6
GND
LT5528
75k
14
BBPQ V
7
BBPI V
25k
13
8
CC
CC
GND
GND
GND
GND
J2
RF
C1
100nF
5528 F06
BBIP
12
11
10
9
17
J6
J3
C2
100nF
BBQP
LT5528
RF
OUT
5528 F07
CC
V
CC
by more
11
5528f

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