CS8421_10 CIRRUS [Cirrus Logic], CS8421_10 Datasheet
![no-image](/images/no-image-200.jpg)
CS8421_10
Manufacturer Part Number
CS8421_10
Description
32-bit, 192-kHz Asynchronous Sample Rate Converter
Manufacturer
CIRRUS [Cirrus Logic]
Datasheet
1.CS8421_10.pdf
(36 pages)
Features
MS_SEL
ISCLK
ILRCK
SAOF
175 dB Dynamic Range
–140 dB THD+N
No Programming Required
No External Master Clock Required
Supports Sample Rates up to 211 kHz
Input/Output Sample Rate Ratios of 7.5:1 to 1:8
Master Clock Support for 128 x Fs, 256 x Fs,
384 x Fs, and 512 x Fs (Master Mode)
16-, 20-, 24-, or 32-bit Data I/O
32-bit Internal Signal Processing
Dither Automatically Applied and Scaled to
Output Resolution
Flexible 3-wire Serial Digital Audio Input and
Output Ports
Master and Slave Modes for Both Input and
Output
SDIN
SAIF
http://www.cirrus.com
32-bit, 192-kHz Asynchronous Sample Rate Converter
3.3 V or 5.0 V (VL)
Audio
Serial
Decoder
Input
Serial
Mode
RST
Port
Sync Info
Data
2.5 V (VD)
Varying
Digital
Digital
Filters
Time
Copyright Cirrus Logic, Inc. 2010
PLL
Level Translators
(All Rights Reserved)
Sync Info
GND
Data
The CS8421 supports sample rates up to 211 kHz and
is available in 20-pin TSSOP and QFN packages in both
Commercial (-10° to +70° C) a nd Automo tive ( -40° to
+85°C) g rades. Th e CDB842 1 Cu stomer Demonstra-
tion b oard is a lso availa ble for d evice evalu ation and
implementation suggestions. Please see
formation” on page 36
Bypass Mode
Time Division Multiplexing (TDM) Mode
Attenuates Clock Jitter
Multiple Device Outputs are Phase Matched
Linear Phase FIR Filter
Automatic Soft Mute/Unmute
+2.5 V Digital Supply (VD)
+3.3 V or 5.0 V Digital Interface (VL)
Space-saving 20-pin TSSOP and QFN
Packages
BYPASS
XTI
Generator
Data
Clock
XTO
Output
Audio
Serial
for complete details.
CS8421
TDM_IN
SDOUT
OSCLK
OLRCK
SRC_UNLOCK
MCLK_OUT
“Ordering In-
DS641F4
May ‘10