V62C18164096L MOSEL [Mosel Vitelic, Corp], V62C18164096L Datasheet

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V62C18164096L

Manufacturer Part Number
V62C18164096L
Description
256K x 16, CMOS STATIC RAM
Manufacturer
MOSEL [Mosel Vitelic, Corp]
Datasheet
MOSEL VITELIC
Features
Device Usage Chart
V62C18164096 Rev. 1.2 June 2000
High-speed: 85, 100 ns
Ultra low CMOS standby current of 2 A (max.)
Fully static operation
All inputs and outputs directly TTL compatible
Three state outputs
Ultra low data retention current (V
Operating voltage: 1.8V – 2.3V
Packages
– 48-Ball CSP BGA (8mm x 10mm)
Operating Temperature
–40 C to +85 C
0 C to 70 C
Range
I/O
UBE
LBE
I/O
CE
CE
WE
OE
A
A
A
A
A
16
0
6
7
8
9
1
1
2
V62C18164096
256K x 16, CMOS STATIC RAM
Package Outline
Control
Circuit
B
CC
Functional Block Diagram
= 1.0V)
Decoder
Circuit
Input
Data
Row
Access Time (ns)
85
1
Description
random-access memory organized as 262,144
words by 16 bits. Inputs and three-state outputs are
TTL compatible and allow for direct interfacing with
common system bus structures.
Column Decoder
A
The V62C18164096 is a 4,194,304-bit static
Memory Array
1024 x 4096
10
Column I/O
100
A
L
17
Power
LL
V
GND
CC
PRELIMINARY
Temperature
Blank
Mark
I

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