AT24C08B ATMEL [ATMEL Corporation], AT24C08B Datasheet - Page 10
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AT24C08B
Manufacturer Part Number
AT24C08B
Description
Two-wire Serial EEPROM
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT24C08B.pdf
(28 pages)
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8.
10
Read Operations
Read operations are initiated the same way as write operations with the exception that the read/write select bit in the
device address word is set to one. There are three read operations: current address read, random address read and
sequential read.
CURRENT ADDRESS READ: The internal data word address counter maintains the last address accessed during the
last read or write operation, incremented by one. This address stays valid between operations as long as the chip
power is maintained. The address “roll over” during read is from the last byte of the last memory page to the first byte of
the first page. The address “roll over” during write is from the last byte of the current page to the first byte of the same
page.
Once the device address with the read/write select bit set to one is clocked in and acknowledged by the EEPROM, the
current address data word is serially clocked out. The microcontroller does not respond with an input zero but does
generate a following stop condition (see
RANDOM READ:
device address word and data word address are clocked in and acknowledged by the EEPROM, the microcontroller
must generate another start condition. The microcontroller now initiates a current address read by sending a device
address with the read/write select bit high. The EEPROM acknowledges the device address and serially clocks out the
data word. The microcontroller does not respond with a zero but does generate a following stop condition (see
13).
SEQUENTIAL READ:
the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM receives an
acknowledge, it will continue to increment the data word address and serially clock out sequential data words. When
the memory address limit is reached, the data word address will “roll over” and the sequential read will continue. The
sequential read operation is terminated when the microcontroller does not respond with a zero but does generate a
following stop condition (see
Figure 9.
AT24C04B/08B
4K
8K
1
1
Device Address
0
0
A random read requires a “dummy” byte write sequence to load in the data word address. Once the
1
1
Sequential reads are initiated by either a current address read or a random address read. After
0
0
Figure 14
A
A
2
2
).
Figure
A
P
1
1
12).
P0
P0
R/W
R/W
5226G–SEEPR–11/09
Figure