25LC080 MICROCHIP [Microchip Technology], 25LC080 Datasheet - Page 10

• Manufacturer Part Number: 25LC080
• Description: 8K SPI TM Bus Serial EEPROM
• Manufacturer: MICROCHIP [Microchip Technology]

25AA080/25LC080/25C080
3.5
The Read Status Register (RDSR) instruction provides
access to the Status register. The Status register may
be read at any time, even during a write cycle. The
Status register is formatted as follows:
The Write-In-Process (WIP) bit indicates whether the
25XX080 is busy with a write operation. When set to a
‘
in progress. This bit is read-only.
FIGURE 3-6:
DS21230D-page 10
1
WPEN
SCK
’, a write is in progress, when set to a ‘
CS
SO
7
SI
Read Status Register (RDSR)
X
6
0
5
X
0
4
X
0
READ STATUS REGISTER TIMING SEQUENCE
1
High-impedance
BP1
3
0
instruction
2
BP0
0
2
3
0
WEL
0
4
1
’, no write is
1
5
WIP
0
0
6
1
7
The Write Enable Latch (WEL) bit indicates the status
of the write enable latch. When set to a ‘
allows writes to the array, when set to a ‘
prohibits writes to the array. The state of this bit can
always be updated via the WREN or WRDI commands
regardless of the state of write protection on the Status
register. This bit is read only.
The Block Protection (BP0 and BP1) bits indicate
which blocks are currently write-protected. These bits
are set by the user issuing the WRSR instruction. These
bits are nonvolatile.
See Figure 3-6 for the RDSR timing sequence.
7
8
6
9
data from Status register
10
5
11
4
 2004 Microchip Technology Inc.
12
3
13
2
14
1
15
0
1
0
’, the latch
’, the latch