25LC080 MICROCHIP [Microchip Technology], 25LC080 Datasheet - Page 12

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25LC080

Manufacturer Part Number
25LC080
Description
8K SPI TM Bus Serial EEPROM
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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25AA080/25LC080/25C080
3.7
The following protection has been implemented to
prevent inadvertent writes to the array:
• The write enable latch is reset on power-up
• A WRITE ENABLE instruction must be issued to
• After a byte write, page write or Status register
• CS must be set high after the proper number of
• Access to the array during an internal write cycle
TABLE 3-3:
DS21230D-page 12
set the write enable latch
write, the write enable latch is reset
clock cycles to start an internal write cycle
is ignored and programming is continued
WPEN
X
0
1
X
Data Protection
WRITE-PROTECT FUNCTIONALITY MATRIX
High
Low
WP
X
X
WEL
0
1
1
1
Protected Blocks
Protected
Protected
Protected
Protected
3.8
The 25XX080 powers on in the following state:
• The device is in low-power Standby mode
• The write enable latch is reset
• SO is in high-impedance state
• A high-to-low level transition on CS is required to
(CS = 1)
enter active state
Unprotected Blocks
Power-On State
Protected
Writable
Writable
Writable
 2004 Microchip Technology Inc.
Status Register
Protected
Protected
Writable
Writable

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