AT49F4096-12RI ATMEL [ATMEL Corporation], AT49F4096-12RI Datasheet - Page 4

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AT49F4096-12RI

Manufacturer Part Number
AT49F4096-12RI
Description
4 Megabit 256K x 16 5-volt Only CMOS Flash Memory
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Notes: 1. The DATA FORMAT in each bus cycle is as follows:
Absolute Maximum Ratings*
Device Operation (Continued)
HARDWARE DATA PROTECTION: Hardware features
protect against inadvertent programs to the AT49F4096 in
the following ways: (a) V
(typical), the program function is inhibited. (b) V
on delay: once V
Command Definition (in Hex)
4-222
Command
Sequence
Read
Chip Erase
Sector
Erase
Word
Program
Boot Block
Lockout
Product ID
Entry
Product ID
Exit
Product ID
Exit
Temperature Under Bias................. -55°C to +125°C
Storage Temperature...................... -65°C to +150°C
All Input Voltages
(including NC Pins)
with Respect to Ground ................... -0.6V to +6.25V
All Output Voltages
with Respect to Ground .............-0.6V to V
Voltage on OE
with Respect to Ground ................... -0.6V to +13.5V
(3)
(3)
2. The 8K word boot sector has the address range
3. Either one of the Product ID Exit commands can
4. SA = sector addresses:
(2)
I/O15 - I/O8 (Don’t Care); I/O7 - I/O0 (Hex)
00000H to 01FFFH.
be used.
SA = 03XXX for PARAMETER BLOCK 1
SA = 05XXX for PARAMETER BLOCK 2
SA = 3FXXX for MAIN MEMORY ARRAY
Cycles
Bus
1
6
6
4
6
3
3
1
CC
has reached the V
AT49F4096
5555
5555
5555
5555
5555
5555
Addr
Addr
xxxx
1st Bus
CC
Cycle
sense: if V
D
Data
AA
AA
AA
AA
AA
AA
F0
OUT
2AAA
2AAA
2AAA
2AAA
2AAA
2AAA
Addr
CC
CC
2nd Bus
Cycle
is below 3.8V
sense level,
(1)
CC
Data
CC
+ 0.6V
55
55
55
55
55
55
power
Addr
5555
5555
5555
5555
5555
5555
3rd Bus
Cycle
5. When the boot block programming lockout feature
the device will automatically time out 10 ms (typical) be-
fore programming. (c) Program inhibit: holding any one of
OE low, CE high or WE high inhibits program cycles. (d)
Noise filter: pulses of less than 15 ns (typical) on the WE
or CE inputs will not initiate a program cycle.
*NOTICE: Stresses beyond those listed under “Absolute Maxi-
Data
is not enabled, the boot block and the main memory block
will erase together (from the same sector erase command).
Once the boot region has been protected, only the main
memory array sector will erase when its sector erase
command is issued.
A0
mum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the
device at these or any other conditions beyond those indi-
cated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
80
80
80
90
F0
5555
5555
5555
Addr
Addr
4th Bus
Cycle
Data
D
AA
AA
AA
IN
2AAA
2AAA
2AAA
Addr
5th Bus
Cycle
Data
55
55
55
SA
Addr
5555
5555
6th Bus
(4, 5)
Cycle
Data
10
30
40

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