M34D64-W_08 STMICROELECTRONICS [STMicroelectronics], M34D64-W_08 Datasheet - Page 15

• Manufacturer Part Number: M34D64-W_08
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

M34D64-W
3.7
3.8
Byte Write
After the Device Select code and the address bytes, the bus master sends one data byte. If
the addressed location is Write-protected (top quarter of the memory), by Write Control
(WC) being driven high, the location is not modified. The bus master terminates the transfer
by generating a Stop condition, as shown in
(data write
Page Write
The Page Write mode allows up to 32 bytes to be written in a single Write cycle, provided
that they are all located in the same ’row’ in the memory: that is, the most significant
memory address bits (b12-b5) are the same. If more bytes are sent than will fit up to the end
of the row, a condition known as ‘roll-over’ occurs. This should be avoided, as data starts to
become overwritten in an implementation dependent way.
The bus master sends from 1 to 32 bytes of data. If Write Control (WC) is high, the contents
of the addressed top quarter of the memory location are not modified. After each byte is
transferred, the internal byte address counter (the 5 least significant address bits only) is
incremented. The transfer is terminated by the bus master generating a Stop condition.
enabled).
Figure 7.: Write mode sequences with WC = 0
Device operation
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