HYB39SC256 QIMONDA [Qimonda AG], HYB39SC256 Datasheet

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HYB39SC256

Manufacturer Part Number
HYB39SC256
Description
256-MBit Synchronous DRAM
Manufacturer
QIMONDA [Qimonda AG]
Datasheet

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June 2007
H Y B 3 9 S C 2 5 6 [ 8 0 / 1 6 ] 0 F E
H Y I 3 9 S C 2 5 6 [ 8 0 / 1 6 ] 0 F F
2 5 6 - M B i t S y n c h r o n o u s D R A M
G r e e n P r o d u c t
S D R A M
I n t e r n e t D a t a S h e e t
Rev. 1.25

Related parts for HYB39SC256

HYB39SC256 Summary of contents

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... HYB39SC256[80/16]0FE, HYI39SC256[80/16]0FF Revision History: 2007-06, Rev. 1.25 Page Subjects (major changes since last revision) All Adapted internet edition 41 Corrected in figure 28 (auto refresh) tRC to tRFC Previous Revision: 2007-06, Rev. 1.24 8 Corrected figure 1 11,12 Corrected block diagram Previous Revision: 2007-06, Rev. 1.23 18 Added text for Auto Refresh Command (CBR) Previous Revision: 2007-06, Rev ...

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Overview This chapter lists all main features of the product family HY[B/I]39SC256[80/16]0F[E/F] and the ordering information. 1.1 Features • Fully Synchronous to Positive Clock Edge • °C Operating Temperature for HYB... • - °C ...

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... Product Type Speed Grade Standard Operating Temperature ( °C) HYB39SC256800FE-6 PC166–333 HYB39SC256160FE-6 HYB39SC256800FE-7 PC133–222 HYB39SC256800FEH-7 HYB39SC256160FE-7 HYB39SC256160FEH-7 HYB39SC256160FF-6 PC166–333 HYB39SC256160FF-7 PC133–222 HYB39SC256800FF-7 Industrial Operating Temperature (- °C) HYI39SC256800FE-6 PC166–333 HYI39SC256160FE-6 HYI39SC256800FE-7 PC133–222 HYI39SC256160FE-7 1) Please check with your Qimonda representative that leadtime and availability of your preferred device and version meet your project requirements ...

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Configuration This chapter contains the pin configuration table, the TSOP and FBGA package drawing, and the block diagrams for the ×8, ×16 organization of the SDRAM. 2.1 Pin Configuration Listed below are the pin configurations sections for the various ...

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Pin No. Name Pin Buffer Type Type Data Signals x8 Organization 2, 8A DQ0 I/O LVTTL 5, 8B DQ1 I/O LVTTL 8, 8C DQ2 I/O LVTTL 11, 8D DQ3 I/O LVTTL 44, 2D DQ4 I/O LVTTL 47, 2C DQ5 I/O ...

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Pin No. Name Pin Buffer Type Type Not connected x8 Organization 7, 10, 13 — 15, 40, 42, 45, 48, 51, 1B, 1C, 1D, 1E, 2E, 8E, 9B, 9C, 9D, 9E Not connected x16 Organization 40 ...

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Rev. 1.25, 2007-06 03062006-NMGU-CQ9D HY[B/I]39SC256[80/16]0F[E/F] 256-MBit Synchronous DRAM Ballout for ×16 Components, PG-TFBGA-54 (top view) 8 Internet Data Sheet FIGURE 2 ...

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Rev. 1.25, 2007-06 03062006-NMGU-CQ9D HY[B/I]39SC256[80/16]0F[E/F] 256-MBit Synchronous DRAM Ballout for ×8 components, PG-TFBGA-54 (top view) 9 Internet Data Sheet FIGURE 3 ...

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Functional Description This chapter lists all defined commands and their usage for this Synchronous DRAM. Operation Device State 3) Bank Active Idle Bank Precharge Any Precharge All Any 3) Write Active 3) Write with Auto Active precharge 3) Read ...

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Field Bits Type BL [2: [6:4] TM [8:7] WBL 9 [12:10] Rev. 1.25, 2007-06 03062006-NMGU-CQ9D Mode Register Definition (BA[1: Description Burst Length Number of sequential bits per DQ related to one read/write command, see ...

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Burst Length Starting Column Address FullPage n Notes 1. For a burst length of two, ...

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Electrical Characteristics 4.1 Operating Conditions Parameter V Input / Output voltage relative Voltage on supply relative Voltage on supply relative to DDQ SS Operating Temperature for HYB... Operating Temperature for ...

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Parameter Supply Voltage I/O Supply Voltage Input high voltage Input low voltage I Output high voltage ( = – 4.0 mA) OUT I Output low voltage ( = 4.0 mA) OUT Input leakage current, any input (0 V < Output ...

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Symbol Test Condition DD1 RC RC(min CKE ≤ DD2P IH (min CKE≥ DD2N IH (min.) , CKE ≥ ...

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AC Characteristics Parameter Clock and Clock Enable Clock Frequency Access Time from Clock Clock High Pulse Width Clock Low Pulse Width Transition time Setup and Hold Times Input Setup Time Input Hold Time CKE Setup Time CKE Hold Time ...

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Parameter Write Cycle Last Data Input to Precharge (Write without Auto Precharge) Last Data Input to Activate (Write with Auto Precharge) DQM Write Mask Latency ° ...

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Package Outlines Rev. 1.25, 2007-06 03062006-NMGU-CQ9D HY[B/I]39SC256[80/16]0F[E/F] 256-MBit Synchronous DRAM Package Outline PG-TSOPII-54 (top view) 18 Internet Data Sheet FIGURE 5 ...

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Notes 1. Drawing according to ISO 8015 2. Dimensions General tolerances +/- 0.15 Rev. 1.25, 2007-06 03062006-NMGU-CQ9D HY[B/I]39SC256[80/16]0F[E/F] 256-MBit Synchronous DRAM Package Outline PG-TFBGA-54-15 19 Internet Data Sheet FIGURE 6 ...

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... SC 256 256 16 0 Values Coding HYB Memory components HYI Memory components, industrial temperature range (-40 °C – +85 ° Single Data Rate SDRAM Consumer Product 128 128 Mbit 256 256 Mbit 512 512 Mbit ×4 40 ×8 80 × ...

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List of Figures Figure 1 Pin Configuration PG–TSOPII– ...

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... Table 8 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 9 Input and Output Capacitances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 10 I Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 DD Table 11 I Specifications and Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 DD Table 12 AC Timing - Absolute Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Table 13 Examples for Nomenclature Fields . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Table 14 Memory Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Rev. 1.25, 2007-06 03062006-NMGU-CQ9D HY[B/I]39SC256[80/16]0F[E/F] 256-MBit Synchronous DRAM ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internet Data Sheet ...

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Table of Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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Edition 2007-06 Published by Qimonda AG Gustav-Heinemann-Ring 212 D-81739 München, Germany © Qimonda AG 2007. All Rights Reserved. Legal Disclaimer The information given in this Internet Data Sheet shall in no event be regarded as a guarantee of conditions or ...

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