X28HC64DI-12 INTERSIL [Intersil Corporation], X28HC64DI-12 Datasheet - Page 13
X28HC64DI-12
Manufacturer Part Number
X28HC64DI-12
Description
5 Volt, Byte Alterable EEPROM
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet
1.X28HC64DI-12.pdf
(16 pages)
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WRITE CYCLE LIMITS
WE Controlled Write Cycle
Notes: (5) t
Symbol
Data Out
Address
t
t
WPH
t
Data In
t
WC
t
DW
t
DV
t
t
t
t
t
t
OES
OEH
t
t
t
BLC
(6) t
CW
WP
AS
AH
CS
CH
DS
DH
WE
(6)
OE
CE
(5)
(6)
(6)
the device requires to automatically complete the internal write operation.
WC
WPH
is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum time
and t
Write cycle time
Address setup time
Address hold time
Write setup time
Write hold time
CE pulse width
OE High setup time
OE High hold time
WE pulse width
WE HIGH recovery
Data valid
Data setup
Data hold
Delay to next write
Byte load cycle
DW
are periodically sampled and not 100% tested.
13
t
AS
t
OES
t
CS
Parameter
t
DV
t
AH
t
WP
X28HC64
t
DS
Data Valid
t
OEH
HIGH Z
Min.
0.15
50
50
50
50
50
10
0
0
0
0
0
0
t
t
WC
t
DH
CH
Typ.
2
(1)
Max.
100
5
1
Unit
ms
June 1, 2005
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
µs
µs
FN8109.0