AT45DB021D ATMEL [ATMEL Corporation], AT45DB021D Datasheet - Page 22
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AT45DB021D
Manufacturer Part Number
AT45DB021D
Description
2-megabit 2.7-volt DataFlash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT45DB021D.pdf
(52 pages)
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11.3
11.4
22
Auto Page Rewrite
Status Register Read
AT45DB021D [Preliminary]
the data bytes in the buffer. During this time (t
is busy. On completion of the compare operation, bit 6 of the status register is updated with the
result of the compare.
This mode is only needed if multiple bytes within a page or multiple pages of data are modified in
a random fashion within a sector. This mode is a combination of two operations: Main Memory
Page to Buffer Transfer and Buffer to Main Memory Page Program with Built-in Erase. A page of
data is first transferred from the main memory to the buffer and then the same data (from the
buffer) is programmed back into its original page of main memory. To start the rewrite operation
for the DataFlash standard page size (264 bytes), a 1-byte opcode, 58H, must be clocked into
the device, followed by three address bytes comprised of 5 don’t care bits, 10 page address bits
(PA9-PA0) that specify the page in main memory to be rewritten and 9 don’t care bits. To initiate
an auto page rewrite for a binary page size (256 bytes), the opcode 58H must be clocked into
the device followed by three address bytes consisting of 6 don’t care bits, 10 page address bits
(A17 - A8) that specify the page in the main memory that is to be written and 8 don’t care bits.
When a low-to-high transition occurs on the CS pin, the part will first transfer data from the page
in main memory to a buffer and then program the data from the buffer back into same page of
main memory. The operation is internally self-timed and should take place in a maximum time of
t
If a sector is programmed or reprogrammed sequentially page by page, then the programming
algorithm shown in
page or several pages are programmed randomly in a sector, then the programming algorithm
shown in
updated/rewritten at least once within every 10,000 cumulative page erase/program operations
in that sector.
The status register can be used to determine the device’s ready/busy status, page size, a Main
Memory Page to Buffer Compare operation result, the Sector Protection status or the device
density. The Status Register can be read at any time, including during an internally self-timed
program or erase operation. To read the status register, the CS pin must be asserted and the
opcode of D7H must be loaded into the device. After the opcode is clocked in, the 1-byte status
register will be clocked out on the output pin (SO), starting with the next clock cycle. The data in
the status register, starting with the MSB (bit 7), will be clocked out on the SO pin during the next
eight clock cycles. After the one byte of the status register has been clocked out, the sequence
will repeat itself (as long as CS remains low and SCK is being toggled). The data in the status
register is constantly updated, so each repeating sequence will output new data.
Ready/busy status is indicated using bit 7 of the status register. If bit 7 is a 1, then the device is
not busy and is ready to accept the next command. If bit 7 is a 0, then the device is in a busy
state. Since the data in the status register is constantly updated, the user must toggle SCK pin to
check the ready/busy status. There are several operations that can cause the device to be in a
busy state: Main Memory Page to Buffer Transfer, Main Memory Page to Buffer Compare,
Buffer to Main Memory Page Program, Main Memory Page Program through Buffer, Page
Erase, Block Erase, Sector Erase, Chip Erase and Auto Page Rewrite.
The result of the most recent Main Memory Page to Buffer Compare operation is indicated using
bit 6 of the status register. If bit 6 is a 0, then the data in the main memory page matches the
EP
. During this time, the status register indicate that the part is busy.
Figure 25-2 (page
Figure 25-1 (page
46) is recommended. Each page within a sector must be
45) is recommended. Otherwise, if multiple bytes in a
COMP
), the status register will indicate that the part
3638B–DFLASH–02/07